%Bibliography
%
%This is some selected bibliography in my research interest areas: 
%Control Systems 
%Stencil Printing Process - Solder paste deposition (Most of them) 
%Fuzzy Logic 
%Neural Networks 
%
%This document was produced using EndNote 5 
%
% Leandro G. Barajas
% L.G.Barajas@ieee.org



% 1) Record # 485
@article{,
   Author	= {Dyckhoff, H. and Pedrycz, W.},
   Title 	= {Generalized Means as Model of Compensative Connectives},
   Journal	= {Fuzzy Sets and Systems},
   Volume	= {14},
   Pages	= {143-1541},
   Year 	= {1984} }


% 2) Record # 484
@book{,
   Author	= {Kapur, J.N.},
   Title 	= {Measures of information and their applications},
   Address	= {New Delhi, India},
   Year 	= {1994} }


% 3) Record # 483
@article{,
   Author	= {Yager, Ronald R.},
   Title 	= {Measuring information in possibilistic logic},
   Journal	= {International Journal of Intelligent Systems},
   Volume	= {14},
   Number	= {5},
   Pages	= {475-500},
   Abstract	= {We provide an overview of the theory of approximate reasoning and discuss the measurement of information in this reasoning system using specificity. It is then shown how to represent the binary propositional logic in the framework of approximate reasoning. Using the measure of specificity we show how to measure the information contained in the propositions of binary logic. Our measure essentially measures the proportion of possibilities eliminated by the proposition. Next we turn to the possibilistic logic and show how to represent this within the framework of approximate reasoning. We again, using specificity, provide for a measure of information of propositions in this logic. Finally we turn to the issue of quantified statements and show how to represent general quantified statements involving predicates within these two logics.},
   Year 	= {1999} }


% 4) Record # 482
@article{,
   Author	= {Pal, N.R.; Pal, S.K.},
   Title 	= {Entropy: a new definition and its applications},
   Journal	= {Systems, Man and Cybernetics, IEEE Transactions on},
   Volume	= {21},
   Pages	= {1260-1270},
   Abstract	= {Shannon's definition of entropy is critically examined and a new definition of classical entropy based on the exponential behavior of information gain is proposed along with its justification. The concept is extended to defining the global, local, and conditional entropy of a gray-level image. Based on these definitions four algorithms for object extraction are developed. One of these algorithms uses a Poisson distribution-based model of an ideal image. A concept of positional entropy giving any information regarding the location of an object in a scene is introduced},
   Keywords	= {entropy; information theory; pattern recognition; picture processing},
   Year 	= {1991} }


% 5) Record # 481
@article{,
   Author	= {Pal, N.R. and Pal, S.K.},
   Title 	= {Object-background segmentation using new definitions of entropy},
   Journal	= {Computers and Digital Techniques, IEE Proceedings E [see also Computers and Digital Techniques, IEE Proceedings-]},
   Volume	= {136},
   Number	= {0143-7062},
   Pages	= {284-295},
   Abstract	= {The definition of Shannon's entropy in the context of information theory is critically examined and some of its applications to image processing problems are reviewed. A new definition of classical entropy based on the exponential behaviour of information-gain is proposed along with its justification. Its properties also include those of Shannon's entropy. The concept is then extended to fuzzy sets for defining a non-probabilistic entropy and to grey tone image for defining its global, local and conditional entropy. Based on those definitions, three algorithms are developed for image segmentation. The superiority of these algorithms is experimentally demonstrated for a set of images having various types of histogram},
   Keywords	= {fuzzy set theory; information theory; picture processing},
   Year 	= {1989} }


% 6) Record # 480
@article{,
   Author	= {Havrda, J.H. and Charvat, F.},
   Title 	= {Quantification Methods of Classification Processes: Concepts of Structural a-Entropy},
   Journal	= {Kybernetica},
   Volume	= {3},
   Pages	= {30-35},
   Year 	= {1967} }


% 7) Record # 479
@article{,
   Author	= {Torra, V.},
   Title 	= {On the learning of weights in some aggregation operators: The weighted mean and the OWA operators},
   Journal	= {Mathware and Soft Computing},
   Volume	= {6},
   Pages	= {249--265},
   Abstract	= {Active set methods},
   Year 	= {1999} }


% 8) Record # 478
@article{,
   Author	= {Ezawa, Hirokazu and Seto, Masaharu and Miyata, Masahiro and Tazawa, Hiroshi},
   Title 	= {Polymer film deposition with fine pitch openings by stencil printing},
   Journal	= {Microelectronics Reliability},
   Volume	= {In Press, Corrected Proof},
   Abstract	= {It is confirmed that stencil printing with a novel developed printable polyimide paste can be used for polymer film deposition on LSI wafers. A thick polyimide film with openings for solder ball bumping can be deposited on all of the LSIs on a wafer by stencil printing at one time. This stencil printing process does not need an expensive lithography process, providing cost-effective wafer-level chip scale packages (WLCSPs). In this study, a novel polyimide paste was tailored to have a higher thixotropy ratio than conventional printable polyimide materials. The novel printable polyimide paste shows that the viscosity ratio of more than 3.5 at the shear rate of 1 to 10 s-1 and that the viscosity increases rapidly after the shear rate is lowered. Fine spaces of 40 [mu]m between 250 [mu]m openings were obtained for 10 [mu]m thick polyimide films on Si wafers. It has been also confirmed that the new paste shows the variation range of 30 [mu]m at the opening size of 385 [mu]m within 100 continuously printed wafers. Even after the new paste was shear-thinned repeatedly, rheological behavior of the new paste was not changed. This robustness leads to higher efficiency of the materials for mass-producing. From the reliability viewpoint of the printed polyimide films, no peelings were observed on plasma-CVD SiN films after the pressure cooker test under the condition of 127 [deg]C and 0.25 MPa with the humidity of 100% for 300 h. The optimal stencil printing process using the novel developed paste will lead to significant cost reduction of a patterned polymer deposition process. Finally, WLCSPs using the stencil printing of the new polyimide paste have been demonstrated for SRAM LSIs on 8-in. wafers.},
   Year 	= {2003} }


% 9) Record # 477
@incollection{,
   Author	= {Renyi, A.},
   Title 	= {On measures of entropy and information},
   BookTitle	= {Proc. of the Fourth Symp. on Math. Stat. and Probability},
   Editor	= {Neyman},
   Address	= {California},
   Year 	= {1961} }


% 10) Record # 476
@article{,
   Author	= {Kalman, R.E.},
   Title 	= {A new approach to linear filtering and prediction problems},
   Journal	= {Transactions of the ASME, Journal of Basic Engineering},
   Volume	= {82 (Series D)},
   Pages	= {35 - 45},
   Year 	= {1960} }


% 11) Record # 475
@article{,
   Author	= {Shannon, Claude Elwood},
   Title 	= {A mathematical theory of communication},
   Journal	= {Bell System Technical Journal},
   Volume	= {27},
   Pages	= {379-423 and 623-656},
   Abstract	= {The recent development of various methods of modulation such as PCM and PPM which exchange bandwidth for signal-to-noise ratio has intensified the interest in a general theory of communication. A basis for such a theory is contained in the important papers of Nyquist1 and Hartley2 on this subject. In the present paper we will extend the theory to include a number of new factors, in particular the effect of noise in the channel, and the savings possible due to the statistical structure of the original message and due to the nature of the final destination of the information. The fundamental problem of communication is that of reproducing at one point either exactly or approximately a message selected at another point. Frequently the messages have meaning; that is they refer to or are correlated according to some system with certain physical or conceptual entities. These semantic aspects of communication are irrelevant to the engineering problem. The significant aspect is that the actual message is one selected from a set of possible messages. The system must be designed to operate for each possible selection, not just the one which will actually be chosen since this is unknown at the time of design. If the number of messages in the set is finite then this number or any monotonic function of this number can be regarded as a measure of the information produced when one message is chosen from the set, all choices being equally likely. As was pointed out by Hartley the most natural choice is the logarithmic function. Although this definition must be generalized considerably when we consider the influence of the statistics of the message and when we have a continuous range of messages, we will in all cases use an essentially logarithmic measure.},
   Keywords	= {Telecommunication, Mathematical physics.},
   Year 	= {1948} }


% 12) Record # 474
@article{,
   Author	= {Yager, Ronald R.},
   Title 	= {New modes of OWA information fusion},
   Journal	= {International Journal of Intelligent Systems},
   Volume	= {13},
   Number	= {7},
   Pages	= {661-681},
   Abstract	= {In this work, we focus on the OWA operator. We view this operator as the inner product of two vectors: a weighting vector containing the weights associated with the aggregation, and a second vector containing the arguments to be aggregated. We note the centrality to this operator of the process used to index the elements in the argument vector, and suggest some new mechanisms for ordering the arguments. In the second part, we study the situation in which the weighting vector is context dependent. Finally, we consider the case in which the arguments to be aggregated are drawn from an ordinal scale; the solution to this problem leads us to consider random weighting vectors.},
   Year 	= {1998} }


% 13) Record # 473
@article{,
   Author	= {Yager, Ronald R.},
   Title 	= {Quantifier guided aggregation using OWA operators},
   Journal	= {International Journal of Intelligent Systems},
   Volume	= {11},
   Number	= {1},
   Pages	= {49-73},
   Abstract	= {We consider multicriteria aggregation problems where, rather than requiring all the criteria be satisfied, we need only satisfy some portion of the criteria. The proportion of the critera required is specified in terms of a linguistic quantifier such as most. We use a fuzzy set representation of these linguistic quantifiers to obtain decision functions in the form of OWA aggregations. A methodology is suggested for including importances associated with the individual criteria. A procedure for determining the measure of orness directly from the quantifier is suggested. We introduce an extension of the OWA operators which involves the use of triangular norms.},
   Year 	= {1996} }


% 14) Record # 472
@article{,
   Author	= {Xu, Z. S. and Da, Q. L.},
   Title 	= {The uncertain OWA operator},
   Journal	= {International Journal of Intelligent Systems},
   Volume	= {17},
   Number	= {6},
   Pages	= {569-575},
   Abstract	= {The ordered weighted averaging (OWA) operator was introduced by Yager[1] to provide a method for aggregating several inputs that lie between the max and min operators. In this article, we investigate the uncertain OWA operator in which the associated weighting parameters cannot be specified, but value ranges can be obtained and each input argument is given in the form of an interval of numerical values. The problem of ranking a set of interval numbers and obtaining the weights associated with the uncertain OWA operator is studied.},
   Year 	= {2002} }


% 15) Record # 471
@article{,
   Author	= {Nettleton, David and Torra, Vicenç},
   Title 	= {A comparison of active set method and genetic algorithm approaches for learning weighting vectors in some aggregation operators},
   Journal	= {International Journal of Intelligent Systems},
   Volume	= {16},
   Number	= {9},
   Pages	= {1069-1083},
   Abstract	= {In this article we compare two contrasting methods, active set method (ASM) and genetic algorithms, for learning the weights in aggregation operators, such as weighted mean (WM), ordered weighted average (OWA), and weighted ordered weighted average (WOWA). We give the formal definitions for each of the aggregation operators, explain the two learning methods, give results of processing for each of the methods and operators with simple test datasets, and contrast the approaches and results.},
   Year 	= {2001} }


% 16) Record # 470
@article{,
   Author	= {Xu, Z. S. and Da, Q. L.},
   Title 	= {The ordered weighted geometric averaging operators},
   Journal	= {International Journal of Intelligent Systems},
   Volume	= {17},
   Number	= {7},
   Pages	= {709-716},
   Abstract	= {The ordered weighted averaging (OWA) operator was introduced by Yager.[1] The fundamental aspect of the OWA operator is a reordering step in which the input arguments are rearranged in descending order. In this article, we propose two new classes of aggregation operators called ordered weighted geometric averaging (OWGA) operators and study some desired properties of these operators. Some methods for obtaining the associated weighting parameters are discussed, and the relationship between the OWA and DOWGA operators is also investigated.},
   Year 	= {2002} }


% 17) Record # 469
@article{,
   Author	= {Mitchell, H. B. and Schaefer, P. A.},
   Title 	= {Multiple priorities in an induced ordered weighted averaging operator},
   Journal	= {International Journal of Intelligent Systems},
   Volume	= {15},
   Number	= {4},
   Pages	= {317-327},
   Abstract	= {The ordered weighted averaging OWA operator of Yager was introduced to provide a method for nonlinearly aggregating a set of input arguments a_i. A fundamental aspect of the OWA operator is a reordering step in which the input arguments are rearranged according to their values. Recently, an induced OWA operator was described in which each input argument a has a single priority a value. The input arguments are then
rearranged according to the priorities a and not their own values. In this paper we show i
how the induced OWA operator may be defined when each argument a has associated i
4 with it N priority values a , pg 1, 2, . . . , N , instead of a single priority value. Finally, i p
we suggest two applications using a multiple priority induced OWA operator. XXX},
   Year 	= {2000} }


% 18) Record # 468
@article{,
   Author	= {Liu, Liping},
   Title 	= {Special issue on the Dempster-Shafer theory of evidence: an introduction},
   Journal	= {International Journal of Intelligent Systems},
   Volume	= {18},
   Number	= {1},
   Pages	= {1-4},
   Abstract	= {The notion of belief functions is a result of the seminar work of Shafer and its conceptual forerunner—lower and upper probabilities. In recent years, we saw a surge of interest in advancing this theory, developing efficient computation algorithms, and applying it to a wide range of business and engineering problems. Among many theoretical advances, the most noticeable are the theory of linear belief functions the theory of transferable beliefs, and the theory of hints. The Dempster-Shafer theory of belief functions has become a primary tool for knowledge representation that bridges fuzzy logic and probabilistic reasoning. It has been applied to many areas including business decision making, accounting, finance, production, management information systems, and electronic commerce. To foster the exchange of these advances and applications, the Institute for Operations Research and Management Sciences invited over 30 scholars to present their current research in a cluster of seven regular sessions and one tutorial at its 2001 annual meeting held at Miami Beach, Florida. The topics of the presentations included: Belief Functions in Expert Systems; Belief Functions in Business Decisions; Belief Functions in Management Information Systems; Belief Functions and Theory of Hints; Belief Functions and Statistics; Modeling Using Belief Functions; and Belief Functions in Electronic Commerce. Arthur P. Dempster and Paul-Andre´ Monney presented the tutorial to the general audience of the meeting.},
   Year 	= {2003} }


% 19) Record # 467
@article{,
   Author	= {Torra, Vicenç},
   Title 	= {The Weighted OWA Operator},
   Journal	= {International Journal of Intelligent Systems},
   Volume	= {12},
   Number	= {2},
   Pages	= {153-166},
   Abstract	= {One of the properties that the OWA operator satisfies is commutativity. This condition, that is not satisfied by the weighted mean, stands for equal reliability of all the information sources that supply the data. In this article we define a new combination function, the WOWA (Weighted OWA), that combines the advantages of the OWA operator and the ones of the weighted mean. We study some of its properties and show how it can be extended to deal with linguistic labels.},
   Year 	= {1997} }


% 20) Record # 466
@phdthesis{Krauss98,
   Author	= {Krauss, Alan},
   Title 	= {Control of run-by-run processes with applications to large-area material deposition},
   School	= {Georgia Institute of Technology},
   Type 	= {Ph.D.},
   Abstract	= {In this work, the run-by-run control problem as it applies to large-area material deposition in electronics packaging is considered. The first part of the work presents a discussion of constructibility and controllability of linear run-by-run processes, and a new matrix Kalman filtering technique for identification of coefficients in a linear process. The next part of the work focuses on nonlinear run-by-run processes for which a new multiple-point block-form linearization technique that may be used to control a nonlinear process is derived. Then, in the third part of the work, identification and nonlinear control techniques are applied to meniscus coating and stencil printing. Methods for identification and control discussed in this work are applied to experimental data. In the case of meniscus coating, control techniques are able to generate process parameters that keep the process output closer to a target value than when the process is run open-loop.},
   Keywords	= {Electronic packaging, Manufacturing processes, Production engineering.},
   Year 	= {1998} }


% 21) Record # 465
@phdthesis{Jahromi00,
   Author	= {Jahromi, Payam Torab},
   Title 	= {Performance analysis of packet-switched networks with tree topology},
   School	= {Georgia Institute of Technology},
   Type 	= {Ph.D.},
   Abstract	= {Generic packet-switched networks with tree topology are the focus of this study. We present a systematic approach to model and analyze these networks from a performance standpoint, with emphasis on network topology as the common element in all network analysis problems. In particular, we study network <italic> load</italic> and <italic>delay analysis</italic> problems. Given the network topology and traffic volume among all network nodes, load analysis is defined as computing the amount of traffic or <italic>load</italic> on all network nodes. Similarly, delay analysis generates end-to-end delay measures by combining the delay times at individual network nodes based on the network topology. Almost all developed algorithms have an iterative nature. They start with the network graph model, coupled with an appropriate performance matrix such as the traffic matrix. The idea is to do some simple processing on the performance matrix and trim the graph model to obtain a reduced equivalent network. The procedure is repeated until the network is reduced to a single node, which is usually the backbone switch in the network. Using these analysis techniques, instead of relying on common conceptions and legacy design rules for particular network topologies, the designer has the freedom of evaluating various topologies and selecting the one that results in the best performance for a particular application.},
   Keywords	= {Pocket switching (Data transmission), Computer networks Mathematical models},
   Year 	= {2000} }


% 22) Record # 464
@phdthesis{Stan99,
   Author	= {Octavian, Stan},
   Title 	= {New recursive algorithms for training feedforward multilayer perceptrons},
   School	= {Georgia Institute of Technology},
   Type 	= {Ph.D.},
   Abstract	= {The topic of this dissertation is the design of high performance least-squares training algorithms for a particular neural network architecture, the feedforward multilayer perceptron (MLP). Three new algorithms are presented. They address two important needs in MLP training: the need for high-efficiency algorithms to train the weights of high-complexity structures and the need for training algorithms with good tracking ability for modeling time-varying nonlinear functions. The first algorithm, called the local linearized least-squares (LLLS), addresses the issue of efficiency. LLLS is a computationally efficient approximation of the global extended Kalman filter (GEKF) algorithm. It is based on solving local system identification subproblems at the neuron level. The LLLS is shown to give better convergence results for two benchmark problems in comparison with existing local algorithms, and to be a good approximation for the GEKF algorithm, used as a benchmark. The second algorithm, called the block Levenberg Marquardt algorithm, addresses the issue of modeling nonlinear time-varying problems. We identify and analyze two important variations of the algorithm: the overlapping and the non-overlapping block Levenberg Marquardt algorithms. It is shown that the block Levenberg Marquardt outperforms other algorithms like the backpropagation algorithm and the global EKF with system noise for time-varying problems. The third algorithm is called block linearized least squares (BLLS), an alteration of the GEKF algorithm with a finite data window. Experiments show that the BLLS performs better than the standard GEKF for a benchmark time-varying problem, but both the GEKF with state noise and the block Levenberg-Marquardt algorithm exceed its performance. At last, the new algorithms are applied for neural network modeling of a process of fine pitch stencil printing for solder paste deposition in surface mount technology (SMT). A feedforward multilayer perceptron is trained to model the nonlinear relationship between the input variables to the process and the solder paste height/variance. The extension of this work to an on-line neural network control of the process is outlined as a topic of future research.},
   Keywords	= {Operations research, Algorithms, Recursive functions, Perceptrons, Error-correcting codes, Neural networks (Computer science)},
   Year 	= {1999} }


% 23) Record # 463
@phdthesis{Detyniecki00,
   Author	= {Detyniecki, Marcin},
   Title 	= {Mathematical Aggregation Operators and their Application to Video Querying},
   School	= {University of Paris 6. University Pierre and Marie Curie},
   Type 	= {Ph.D.},
   Abstract	= {In this manuscript we present the mathematical aggregation operators and their application to the video querying. This work is divided in three parts. The first one offers the definition of mathematical aggregation operators and some properties, followed by an extensive overview of the existing operators. The second part is dedicated to the study of the aggregation under uncertainty. We present a deep study on t-norms and t-conorms, pursued by a study on aggregation of truth and falsity values in non-phrase calculus way. We also introduce a non-axiomatic way, based on the metaphor of a balance, which in the one hand allows the visualization of the global behavior and of the sensitivity of an operator and in the other hand offers a guide for the construction of additive generated operators.  The third part is devoted to the illustration of the theoretical results in the framework of video querying. We expound two complementary approaches. The first one based on "computing with words" explains how to browse a video with temporal queries. The second one makes obvious how to aggregate criteria pointing to the same conclusion. We prove the feasibility of the approach with real search engine and we expound the used technology (Java, XML, etc.)},
   Keywords	= {Aggregation, Multimedia, Fuzzy logic, Data Fusion, Video, Truth and Falsity, Mathematical Operators, Query, Balance Metaphor},
   Year 	= {2000} }


% 24) Record # 462
@article{,
   Author	= {Zadeh, L.A.},
   Title 	= {Fuzzy logic},
   Journal	= {Computer},
   Volume	= {21},
   Pages	= {83-93},
   Abstract	= {The author presents a condensed exposition of some basic ideas underlying fuzzy logic and describes some representative applications. He covers basic principles; meaning representation and inference; basic rules of inference; and the linguistic variable and its application to fuzzy control},
   Keywords	= {formal logic; fuzzy set theory},
   Year 	= {1988} }


% 25) Record # 461
@article{,
   Author	= {Zadeh, L.A.},
   Title 	= {From computing with numbers to computing with words. From manipulation of measurements to manipulation of perceptions},
   Journal	= {Circuits and Systems I: Fundamental Theory and Applications, IEEE Transactions on},
   Volume	= {46},
   Pages	= {105-119},
   Abstract	= {Discusses a methodology for reasoning and computing with perceptions rather than measurements. An outline of such a methodology-referred to as a computational theory of perceptions is presented in this paper. The computational theory of perceptions, or CTP for short, is based on the methodology of CW. In CTP, words play the role of labels of perceptions and, more generally, perceptions are expressed as propositions in a natural language. CW-based techniques are employed to translate propositions expressed in a natural language into what is called the Generalized Constraint Language (GCL). In this language, the meaning of a proposition is expressed as a generalized constraint, N is R, where N is the constrained variable, R is the constraining relation and isr is a variable copula in which r is a variable whose value defines the way in which R constrains S. Among the basic types of constraints are: possibilistic, veristic, probabilistic, random set, Pawlak set, fuzzy graph and usuality. The wide variety of constraints in GCL makes GCL a much more expressive language than the language of predicate logic. In CW, the initial and terminal data sets, IDS and TDS, are assumed to consist of propositions expressed in a natural language. These propositions are translated, respectively, into antecedent and consequent constraints. Consequent constraints are derived from antecedent constraints through the use of rules of constraint propagation. The principal constraint propagation rule is the generalized extension principle. The derived constraints are retranslated into a natural language, yielding the terminal data set (TDS). The rules of constraint propagation in CW coincide with the rules of inference in fuzzy logic. A basic problem in CW is that of explicitation of N, R, and r in a generalized constraint, X is R, which represents the meaning of a proposition, p, in a natural language},
   Keywords	= {computation theory; constraint theory; fuzzy set theory; natural languages},
   Year 	= {1999} }


% 26) Record # 460
@inproceedings{,
   Author	= {Zadeh, L.A.},
   Title 	= {From computing with numbers to computing with words. manipulation of measurements to manipulation of perceptions},
   BookTitle	= {Intelligent Processing and Manufacturing of Materials, 1999. IPMM '99. Proceedings of the Second International Conference on},
   Volume	= {1},
   Pages	= {3-4},
   Year 	= {1999} }


% 27) Record # 459
@inproceedings{,
   Author	= {Zadeh, L.A.},
   Title 	= {It is a fundamental limitation to base probability theory on bivalent logic},
   BookTitle	= {Fuzzy Information Processing Society, 2002. Proceedings. NAFIPS. 2002 Annual Meeting of the North American},
   Pages	= {515-517},
   Abstract	= {Probability theory has long played-and is continuing to play-the role of the principal tool for dealing with problems in which uncertainty is a significant factor. The history of probability theory is a history of important advances in our understanding of decision-making in uncertain environments. But what we see alongside the brilliant successes are problem areas in which progress has been elusive. An example is the class of problems in which probabilities, utilities and relations are ill-defined in ways that put such problems well beyond the reach of existing methods. A thesis that is put forth is that standard probability theory, call it PT, has fundamental limitations-limitations which are rooted in the fact that PT is based on bivalent logic. It is this thesis that underlies the radically-sounding title of the paper: It is a fundamental limitation to base probability theory on bivalent logic. The principal rationale for this thesis is that the conceptual structure of PT is directed at addressing the partiality of certainty but not the partiality of possibility and, most importantly, the partiality of truth. A direct consequence of these omissions is that PT lacks the capability to deal with information which is not just partially certain but also partially possible and/or partially true. An example is: Most analysts believe that it is very unlikely that there will be a significant increase in the price of oil in the near future.},
   Keywords	= {decision theory;  formal logic;  probability;  uncertainty handling},
   Year 	= {2002} }


% 28) Record # 458
@article{,
   Author	= {Zadeh, L.A.},
   Title 	= {Fuzzy logic = computing with words},
   Journal	= {Fuzzy Systems, IEEE Transactions on},
   Volume	= {4},
   Pages	= {103-111},
   Abstract	= {As its name suggests, computing with words (CW) is a methodology in which words are used in place of numbers for computing and reasoning. The point of this note is that fuzzy logic plays a pivotal role in CW and vice-versa. Thus, as an approximation, fuzzy logic may be equated to CW. There are two major imperatives for computing with words. First, computing with words is a necessity when the available information is too imprecise to justify the use of numbers, and second, when there is a tolerance for imprecision which can be exploited to achieve tractability, robustness, low solution cost, and better rapport with reality. Exploitation of the tolerance for imprecision is an issue of central importance in CW. In CW, a word is viewed as a label of a granule; that is, a fuzzy set of points drawn together by similarity, with the fuzzy set playing the role of a fuzzy constraint on a variable. The premises are assumed to be expressed as propositions in a natural language. In coming years, computing with words is likely to evolve into a basic methodology in its own right with wide-ranging ramifications on both basic and applied levels},
   Keywords	= {computational linguistics; constraint handling; fuzzy logic; fuzzy set theory; inference mechanisms; natural languages},
   Year 	= {1996} }


% 29) Record # 457
@book{,
   Author	= {Yager, Ronald R. and Kacprzyk, Janusz and Fedrizzi, Mario},
   Title 	= {Advances in the Dempster-Shafer theory of evidence},
   Publisher	= {J. Wiley},
   Keywords	= {Neural networks (Computer science)
Fuzzy systems.
Artificial intelligence.},
   Year 	= {1994} }


% 30) Record # 456
@book{,
   Author	= {Yager, Ronald R. and Kacprzyk, Janusz},
   Title 	= {The ordered weighted averaging operators : theory and applications},
   Publisher	= {Kluwer Academic Publishers},
   Abstract	= {Edited by Ronald R. Yager and Janusz Kacprzyk.
ill. ; 25 cm.
Kolmogorov's theorem and its impact on soft computing / H.T. Nguyen and V. Kreinovich -- Possibility and necessity in weighted aggregation / C. Carlsson, R. Fuller and S. Fuller -- OWA operators and an extension of the contrast model / B. Bouchon-Meunier and M. Rifqi -- Equivalence of changes in proportions at crossroads of mathematical theories / J. Aczel, G. Rote and J. Schwaiger -- On the inclusion of importances in OWA aggregation / R.R. Yager -- On the linguistic OWA operator and extensions / F. Herrera and E. Herrera-Viedma -- Alternative representations of OWA operators / M. Grabisch -- Useful tools for aggregation procedures: some consequences and applications of Strassen's measurable Hahn-Banach theorem / H.J. Skala -- OWA specificity / A. Ramer -- Ordered continuous means and information / A. Ramer -- OWA operators in decision making with uncertainty and nonnumeric payoffs / R.R. Yager and M.T. Lamata -- On the role of immediate probability in various decision making models / K.J. Engemann and R.R. Yager -- Risk management using fuzzy logic and genetic algorithms / T.C. Rubinson and G. Geotsi -- OWA operators for doctoral student selection problem / C. Carlsson, R. Fuller and Sz. Fuller -- Beyond min aggregation in multicriteria decision: (ordered) weighted mean, discri-min, leximin / D. Dubois, H. Fargier and H. Prade -- OWA operators in group decision making and consensus reaching under fuzzy preferences and fuzzy majority / J. Kacprzyk, M. Fedrizzi and H. Nurmi -- Applications of the linguistic OWA operators in group decision making / F. Herrera, E. Herrera-Viedma and J.L. Verdegay -- Aggregation rules in committee procedures / J. Montero and V. Cutello -- Quantified statements and some interpretations for the OWA operators / P. Bosc and L. Lietard -- Using OWA operators in flexible query processing / M.-A. Vila ... [et al.] -- Application of OWA operators to soften information retrieval systems / G. Bordogna and G. Pasi -- Implementation of OWA operators in fuzzy querying for Microsoft Access / J. Kacprzyk and S. Zadrozny -- OWA-based computing: learning algorithms / W. Pedrycz -- OWA operators in machine learning from imperfect examples / J. Kacprzyk -- An application of OWA operators to the aggregation of multiple classification decisions / L.I. Kuncheva.},
   Keywords	= {Artificial intelligence, Operator theory, Fuzzy logic},
   Year 	= {1997} }


% 31) Record # 455
@article{Ling03,
   Author	= {Ling Chunxian, Zou and Milos, Dusek and Martin, Wickham and Christopher, Hunt},
   Title 	= {Fine pitch stencil printing using enclosed printing systems},
   Journal	= {Soldering & Surface Mount Technology},
   Volume	= {15},
   Number	= {1},
   Pages	= {43 - 49},
   Abstract	= {Enclosed print heads have recently been developed as an improvement on the traditional squeegee methods for solder paste printing. They offer the opportunity of widening the printing process window and reducing process waste. Consequently, this work was undertaken to evaluate some aspects of enclosed print head printing, and it has been shown to be a robust process. A number of performance factors were established: with increased humidity the paste degradation was limited due to its sealed paste reservoir; the system also permitted successful intermittent printing over a 5 day period; printing is much more tolerant to distorted substrates than some squeegee blades, and hence improves printing on non-planar surfaces; significant reduction in paste wastage occurs, since paste ageing is reduced.},
   Keywords	= {Stencils, Solder Pastes, Assembly},
   Year 	= {2003} }


% 32) Record # 454
@book{Fleming99,
   Author	= {Fleming, Wendell Helms and McEneaney, William M. and Yin, George and Zhang, Qing},
   Title 	= {Stochastic analysis, control, optimization, and applications : a volume in honor of W.H. Fleming},
   Publisher	= {Birkhäuser},
   Note 	= {William M. McEneaney, G. George Yin, and Qing Zhang, editors.
ill. ; 25 cm.
W.H. Fleming's curriculum vitae -- Representations for functionals of Hilbert space valued diffusions / A. Budhiraja and P. Dupuis -- Risk-sensitive, minimax, and mixed risk-neutral/minimax control of Markov decision processes / S.P. Coraluppi and S.I. Marcus -- Partially observed control problems with multiplicative cost / D. Hernandez-Hernandez -- Nonlinear semigroups for partially observed risk-sensitive control and minimax games / M.R. James -- Nonlinear, dissipative, infinite dimensional systems / M. Kocan and P. Soravia -- Singular limits of Bellman equations of ergodic type related to risk-sensitve control / H. Nagai -- Game approach to risk sensitive control for stochastic evolution systems / M. Nisio -- On the solutions of the equation arising from the singular limit of some Eigen problems / S.-J. Sheu and A.D. Wentzell.
(continued) Nonlinear H[superscript exponent infinity] controller design via viscosity supersolutions of the Isaacs equation / M. Xiao and T. Basar -- Singularities of semiconcave functions in Banach spaces / P. Albano and P. Cannarsa -- Invariant sets for controlled degenerate diffusions: a viscosity solutions approach / M. Bardi and P. Goatin -- Remarks on the Dirichlet problem for quasilinear elliptic and parabolic equations / G. Barles, E. Rouy, and P.E. Souganidis -- A generalized Hamilton-Jacobi-Bellman equation for deterministic optimal control problems / L.D. Berkovitz -- Regular solutions of stochastic Burgers equation / P.L. Chow -- Piecewise-deterministic processes and viscosity solutions / M.H.A. Davis and M. Farid -- Mathematical approaches to the problem of noise-induced exit / M.V. Day.
(continued) An approximation scheme for evolutive Hamilton-Jacobi equations / M. Falcone and T. Giorgi -- Homogenization of the Cauchy problem for Hamilton-Jacobi equations / H. Ishii -- The critical exponent for a stochastic PDE to hit zero / C. Mueller and E. Pardoux -- Robustness of Zakai's equation via Feynman-Kac representations / R. Atar, F. Viens, and O. Zeitouni -- Estimation of probability distributions for individual parameters using aggregate population data / H.T. Banks ... [et al.] -- Solvable infinite time horizon stochastic control problems in noncompact symmetric spaces / T.E. Duncan -- Exact finite dimensional filters for exponential functionals of the state / R.J. Elliott and V. Krishnamurthy -- A Lyapunov theory of nonlinear observers / A.J. Krener -- Existence of optimal controls for variance control / H.J. Kushner.
(continued) On optimal ergodic control of diffusions with jumps / J.-L. Menaldi and M. Robin -- Markov marginal problems and their applications to Markov optimal control / T. Mikami -- Entropy inequalities and entropy dynamics in nonlinear filtering of diffusion processes / D. Ocone -- Identification for linear stochastic distributed parameter systems with boundary/point control / B. Pasik-Duncan -- Monte Carlo estimation of diffusion distributions at inter-sampling times / C.J. Wypasek, J.V. Butera, and B.G. Fitzpatrick -- Option pricing in a market with frictions / A. Bensoussan and H. Julien -- Pathwise comparison of arithmetic Brownian motions and log-normal processes / G. Ferreyra and P. Sundar -- Critical power for asymptotic connectivity in wireless networks / P. Gupta and P.R. Kumar -- Pricing models with transaction fees / J.E. Hodder and T. Zariphopoulou.
(continued) A verification theorem in general equilibrium model of asset prices / C.-F. Huang, M. Taksar, and S.H. Zhu -- Optimal portfolio management with partial observations and power utility function / R. Rishel -- Hierarchical production controls for a stochastic manufacturing system with long-run average cost: asymptotic optimality / S.P. Sethi and H. Zhang.},
   Keywords	= {Stochastic analysis, Control theory},
   Year 	= {1999} }


% 33) Record # 453
@book{Kushner92,
   Author	= {Kushner, Harold J. and Dupuis, Paul},
   Title 	= {Numerical methods for stochastic control problems in continuous time},
   Publisher	= {Springer-Verlag},
   Keywords	= {Stochastic control theory, Markov processes Numerical analysis},
   Year 	= {1992} }


% 34) Record # 452
@book{Kushner84,
   Author	= {Kushner, Harold J.},
   Title 	= {Approximation and weak convergence methods for random processes, with applications to stochastic systems theory},
   Publisher	= {MIT Press},
   Keywords	= {Stochastic processes, Approximation theory, Convergence, Stochastic systems},
   Year 	= {1984} }


% 35) Record # 451
@book{Kushner78,
   Author	= {Kushner, Harold J. and Clark, Dean S.},
   Title 	= {Stochastic approximation methods for constrained and unconstrained systems},
   Publisher	= {Springer-Verlag},
   Keywords	= {Stochastic approximation, Estimation theory, Convergence},
   Year 	= {1978} }


% 36) Record # 450
@book{Kushner01,
   Author	= {Kushner, Harold J. and Dupuis, Paul},
   Title 	= {Numerical methods for stochastic control problems in continuous time},
   Publisher	= {Springer},
   Edition	= {2nd},
   Keywords	= {Stochastic control theory, Markov processes, Numerical analysis},
   Year 	= {2001} }


% 37) Record # 449
@inproceedings{Filev94,
   Author	= {Filev, D. and Yager, R.R.},
   Title 	= {Learning OWA operator weights from data},
   BookTitle	= {Fuzzy Systems, 1994. IEEE World Congress on Computational Intelligence., Proceedings of the Third IEEE Conference on},
   Volume	= {1},
   Pages	= {468-473},
   Abstract	= {We investigate the issue of obtaining the weights associated with the ordered weighted operator (OWA) aggregation in the situation when we have observed data on the arguments and the aggregated value. This provides a procedure to learn the decision maker's level of confidence from previous decisions. We next introduce a family of OWA operators called exponential OWA operators},
   Keywords	= {aggregated value; confidence level; constrained optimisation; decision making; decision theory; fuzzy set theory; learning; learning (artificial intelligence); operator weights; optimisation; ordered weighted operator},
   Year 	= {1994} }


% 38) Record # 448
@inproceedings{OHagan90,
   Author	= {O'Hagan, M.},
   Title 	= {A Fuzzy Neuron Based on Maximum Entropy Ordered Weighted Averaging},
   BookTitle	= {Signals, Systems and Computers, 1990. 1990 Conference Record Twenty-Fourth Asilomar Conference on},
   Volume	= {2},
   Pages	= {618},
   Year 	= {1990} }


% 39) Record # 447
@article{Godo00,
   Author	= {Godo, L. and Torra, V.},
   Title 	= {On aggregation operators for ordinal qualitative information},
   Journal	= {Fuzzy Systems, IEEE Transactions on},
   Volume	= {8},
   Pages	= {143-154},
   Abstract	= {In many fuzzy systems applications, values to be aggregated are of a qualitative nature. In that case, if one wants to compute some type of average, the most common procedure is to perform a numerical interpretation of the values, and then apply one of the well-known (the most suitable) numerical aggregation operators. However, if one wants to stick to a purely qualitative setting, choices are reduced to either weighted versions of max-min combinations or to a few existing proposals of qualitative versions of ordered weighted average (OWA) operators. In this paper, we explore the feasibility of defining a qualitative counterpart of the weighted mean operator without having to use necessarily any numerical interpretation of the values. We propose a method to average qualitative values, belonging to a (finite) ordinal scale, weighted with natural numbers, and based on the use of finite t-norms and t-conorms defined on the scale of values. Extensions of the method for other OWA-like and Choquet integral-type aggregations are also considered},
   Keywords	= {fuzzy systems},
   Year 	= {2000} }


% 40) Record # 446
@inproceedings{Berenji90,
   Author	= {Berenji, H.R. and Chen, Y.-Y. and Yager, R.R.},
   Title 	= {Using new aggregation operators in rule-based intelligent control},
   BookTitle	= {Decision and Control, 1990., Proceedings of the 29th IEEE Conference on},
   Volume	= {4},
   Pages	= {2198-2203},
   Abstract	= {A new aggregation operator is applied in the design of an approximate reasoning-based controller. The ordered weighted averaging (OWA) operator has the property of lying between the AND function and the OR function used in previous fuzzy set reasoning systems. It is shown that, by applying OWA operators, more generalized types of control rules, which may include linguistic quantifiers such as MANY and MOST, can be developed. The new aggregation operators, as tested in a cart-pole balancing control problem, illustrate improved performance when compared with existing fuzzy control aggregation schemes},
   Keywords	= {control system synthesis, fuzzy logic, inference mechanisms, knowledge based systems},
   Year 	= {1990} }


% 41) Record # 445
@inproceedings{Beliakov02,
   Author	= {Beliakov, G.},
   Title 	= {Methods of construction of OWA operators from data},
   BookTitle	= {Fuzzy Systems, 2001. The 10th IEEE International Conference on},
   Volume	= {1},
   Pages	= {184-187},
   Abstract	= {This paper investigates the problem of obtaining the weights of the ordered weighted aggregation (OWA) operators from observations. The problem is formulated as a restricted least squares and uniform approximation problems. We take full advantage of the linearity of the problem. In the former case, a well known technique of non-negative least squares is used. In a case of uniform approximation, we employ a recently developed cutting angle method of global optimisation. Both presented methods give results superior to earlier approaches, and do not require complicated nonlinear constructions. Additional restrictions, such as degree of orness of the operator, can be easily introduced},
   Keywords	= {convergence; convergence of numerical methods; cutting angle method; deterministic global optimisation; fuzzy set theory; least squares approximations; linear least squares; optimisation; ordered weighted aggregation operators; weights learning},
   Year 	= {2001} }


% 42) Record # 444
@inproceedings{OHagan88,
   Author	= {O'Hagan, M.},
   Title 	= {Aggregating Template Or Rule Antecedents In Real-time Expert Systems With Fuzzy Set Logic},
   BookTitle	= {Signals, Systems and Computers, 1988. Twenty-Second Asilomar Conference on},
   Volume	= {2},
   Pages	= {681-689},
   Year 	= {1988} }


% 43) Record # 443
@article{Barajas+NN03,
   Author	= {Barajas, Leandro G. and Egerstedt, Magnus and Kamen, Edward W. and Goldstein, Alex},
   Title 	= {Stencil printing process modeling and control using statistical neural networks},
   Journal	= {Submitted to IEEE Transactions on Control Systems Technology},
   Abstract	= {This paper presents a neural network model for the Stencil Printing Process (SPP) in Surface Mount Technology (SMT) manufacturing of Printed Circuit Boards (PCB). A practical model description that decomposes the overall steady-state process in independently modelled subspaces is provided. The neural network model can be updated in real-time procuring a method to control the process by dynamically searching the optimal set point of the control variables. The optimization is performed by minimizing the mean squared error with respect to the desired solder brick height; furthermore, in the case when multiple solutions exist, the set point that yields the lowest variance is used. The process simulator is mainly suitable for offline testing and debugging of more complex closed-loop control algorithms for the SPP optimization providing a common and realistic framework for algorithm performance evaluation. The soundness of this paper is based on the fact that the estimation of the sampled moments of the probability distributions is made using a statistically significant number of data samples from each board, for each component type, for each printing direction, and for each pad orientation.},
   Keywords	= {Stencil printing process model, statistical neural networks, surface mount technology, closed loop control},
   Year 	= {2003} }


% 44) Record # 442
@incollection{Barajas+Hybrid03,
   Author	= {Barajas, Leandro G. and Kansal, A. and Saxena, A. and Egerstedt, Magnus and Goldstein, Alex and Kamen, Edward W.},
   Title 	= {Modeling and control of SMT manufacturing lines using hybrid dynamic systems},
   BookTitle	= {Hybrid Systems: Computation and Control},
   Publisher	= {Springer-Verlag},
   Address	= {Prague, The Czech Republic},
   Abstract	= {In this paper we show how hybrid control and modeling techniques can be put to work for solving a problem of industrial relevance in Surface Mount Technology (SMT) manufacturing. In particular, by closing the loop over the stencil printing process, we obtain a robust system that can recover from faulty initial settings, adapt to environmental changes and unscheduled interrupts, and remove discrepancies associated with bidirectional printing machines. Moreover, a timed Petri net argument is invoked for bounding the control effort in such a way that the throughput of the system is unaffected by the introduction of the closed-loop controller. The soundness of the approach is verified on a real SMT manufacturing line.},
   Year 	= {2003} }


% 45) Record # 441
@article{Filev+Yager98,
   Author	= {Filev, Dimitar and Yager, Ronald R.},
   Title 	= {On the issue of obtaining OWA operator weights},
   Journal	= {Fuzzy Sets and Systems},
   Volume	= {94},
   Number	= {2},
   Pages	= {157-169},
   Abstract	= {We first investigate the issue of obtaining the weights associated with the OWA aggregation in the situation when we have observed data on the arguments and the aggregated value. We next introduce a family of OWA operators called exponential OWA operators. Finally, we look at a simple procedure for generating the weights given a required degree of orness.},
   Year 	= {1998} }


% 46) Record # 440
@inproceedings{Torra96,
   Author	= {Torra, V.},
   Title 	= {Weighted OWA operators for synthesis of information},
   BookTitle	= {Fuzzy Systems, 1996., Proceedings of the Fifth IEEE International Conference on},
   Volume	= {2},
   Pages	= {966-971},
   Abstract	= {One of the properties that the OWA operator satisfies is commutativity. This condition, that is not satisfied by the weighted mean, stands far equal reliability of all the information sources that supply the data. In this paper we define a new combination function, the WOWA (Weighted OWA), that combines the advantages of the OWA operator and the ones of the weighted mean},
   Keywords	= {fuzzy logic, sensor fusion},
   Year 	= {1996} }


% 47) Record # 439
@article{Lamata94,
   Author	= {Lamata, M.T.},
   Title 	= {A Model of Decision with Linguistic Knowledge},
   Journal	= {Mathware and Soft Computing},
   Volume	= {3},
   Pages	= {253-263},
   Abstract	= {The aim of this paper is to develop a new aggregating method for the decision problem in which the possible values of rewards are known in linguistic terms. We show new operators for solving this problem, as well as the way in which OWA operators provide us with an adequate framework for representing the optimism degree of the decision maker in case we have no information about the real state.},
   Keywords	= {decision-making, linguistic label, uncertainty, operators},
   Year 	= {1994} }


% 48) Record # 438
@article{Kenney98,
   Author	= {Kenney, C. S. and Laub, A. J. and Reese, M. S.},
   Title 	= {Statistical Condition Estimation for Linear Least Squares},
   Journal	= {SIAM Journal on Matrix Analysis and Applications},
   Volume	= {19},
   Number	= {4},
   Pages	= {906-923},
   Abstract	= { Statistical condition estimation is applied to the linear least squares problem. The method obtains componentwise condition estimates via the Fréchet derivative. A rigorous statistical theory exists that determines the probability of accuracy in the estimates. The method is as computationally efficient as normwise condition estimation methods, and it is easily adapted to respect structural constraints on perturbations of the input data. Several examples illustrate the method.},
   Keywords	= {conditioning, sensitivity, linear least squares},
   Year 	= {1998} }


% 49) Record # 437
@article{Ghaoui+Lebret97,
   Author	= {El Ghaoui, Laurent  and Lebret, Hervé},
   Title 	= {Robust Solutions to Least-Squares Problems with Uncertain Data},
   Journal	= {SIAM Journal on Matrix Analysis and Applications},
   Volume	= {18},
   Number	= {4},
   Pages	= {1035-1064},
   Abstract	= {We consider least-squares problems where the coefficient matrices A,b are unknown but bounded. We minimize the worst-case residual error using (convex) second-order cone programming, yielding an algorithm with complexity similar to one singular value decomposition of A. The method can be interpreted as a Tikhonov regularization procedure, with the advantage that it provides an exact bound on the robustness of solution and a rigorous way to compute the regularization parameter. When the perturbation has a known (e.g., Toeplitz) structure, the same problem can be solved in polynomial-time using semidefinite programming (SDP). We also consider the case when A,b are rational functions of an unknown-but-bounded perturbation vector. We show how to minimize (via SDP) upper bounds on the optimal worst-case residual. We provide numerical examples, including one from robust identification and one from robust interpolation.},
   Keywords	= {least-squares problems, uncertainty, robustness, second-order cone programming, semidefinite programming, ill-conditioned problem, regularization, robust identification, robust interpolation},
   Year 	= {1997} }


% 50) Record # 436
@article{Yager88,
   Author	= {Yager, R.R.},
   Title 	= {On ordered weighted averaging aggregation operators in multicriteria decisionmaking},
   Journal	= {Systems, Man and Cybernetics, IEEE Transactions on},
   Volume	= {18},
   Pages	= {183-190},
   Abstract	= {The author is primarily concerned with the problem of aggregating multicriteria to form an overall decision function. He introduces a type of operator for aggregation called an ordered weighted aggregation (OWA) operator and investigates the properties of this operator. The OWA's performance is found to be between those obtained using the AND operator, which requires all criteria to be satisfied, and the OR operator, which requires at least one criteria to be satisfied},
   Keywords	= {decision theory, optimisation, set theory},
   Year 	= {1988} }


% 51) Record # 435
@article{Torra02,
   Author	= {Torra, V.},
   Title 	= {Learning weights for the quasi-weighted means},
   Journal	= {Fuzzy Systems, IEEE Transactions on},
   Volume	= {10},
   Pages	= {653-666},
   Abstract	= {In this paper, we study the determination of weights for quasi-weighted means (also called quasi-linear means) when a set of examples is given. We consider first a simple case, the learning of weights for weighted means, and then we extend the approach to the more general case of a quasi-weighted mean. We consider the case of a known arbitrary generator . This paper finishes considering the use of parametric functions that are suitable when the values to aggregate are measure values or ratio ones.},
   Keywords	= {Aggregation operators, data fusion, parameter determination, quasi-linear means, quasi-weighted means, weighted mean},
   Year 	= {2002} }


% 52) Record # 433
@inproceedings{Kvalseth00,
   Author	= {Kvalseth, T.O.},
   Title 	= {On exponential entropies},
   BookTitle	= {Systems, Man, and Cybernetics, 2000 IEEE International Conference on},
   Volume	= {4},
   Pages	= {2822-2826 vol.4},
   Abstract	= {As a number of information, an entropy has been defined as the weighted mean of a set of exponential functions involving the probabilities of a set of random events. The exponential entropy is claimed to have certain advantages over the classical Shannon entropy (C.E. Shannon, 1948). The article proposes two different generalizations of the exponential entropy, each of which represents a one-parameter generalization. Shannon's entropy is shown to be a particular member of one of these two new families of information measures. Some of the important properties of the new measures are discussed},
   Keywords	= {computational complexity, entropy, probability},
   Year 	= {2000} }


% 53) Record # 432
@inproceedings{Torra00,
   Author	= {Torra, V.},
   Title 	= {Learning weights for weighted OWA operators},
   BookTitle	= {Industrial Electronics Society, 2000. IECON 2000. 26th Annual Conference of the IEEE},
   Volume	= {4},
   Pages	= {2530-2535},
   Abstract	= {Weighted OWA (ordered weighted aggregation) operators were introduced as a generalization of the weighted mean (WM) and the OWA operators, so that the advantages of both could be used in a single data fusion function. In this work, we study the determination of their parameters when a set of examples is at our disposal. The approach presented in this paper is of interest in data mining when a certain variable has to be expressed in terms of some other ones. In this case, the learning of weights corresponds to fitting the model, and the weights correspond to the importance of the variables and of their values},
   Keywords	= {data mining, learning by example, mathematical operators, sensor fusion},
   Year 	= {2000} }


% 54) Record # 431
@article{Uykan00,
   Author	= {Uykan, Z. and Guzelis, C. and Celebi, M.E. and Koivo, H.N.},
   Title 	= {Analysis of input-output clustering for determining centers of RBFN},
   Journal	= {Neural Networks, IEEE Transactions on},
   Volume	= {11},
   Pages	= {851-858},
   Abstract	= {The key point in design of radial basis function networks is to specify the number and the locations of the centers. Several heuristic hybrid learning methods, which apply a clustering algorithm for locating the centers and subsequently a linear least-squares method for the linear weights, have been previously suggested. These hybrid methods can be put into two groups, which will be called as input clustering (IC) and input-output clustering (IOC), depending on whether the output vector is also involved in the clustering process. The idea of concatenating the output vector to the input vector in the clustering process has independently been proposed by several papers in the literature although none of them presented a theoretical analysis on such procedures, but rather demonstrated their effectiveness in several applications. The main contribution of this paper is to present an approach for investigating the relationship between clustering process on input-output training samples and the mean squared output error in the context of a radial basis function network (RBFN). We may summarize our investigations in that matter as follows: (1) A weighted mean squared input-output quantization error, which is to be minimized by IOC, yields an upper bound to the mean squared output error. (2) This upper bound and consequently the output error can be made arbitrarily small (zero in the limit case) by decreasing the quantization error which can be accomplished through increasing the number of hidden units},
   Keywords	= {heuristic programming, learning (artificial intelligence), least squares approximations, minimisation, pattern clustering, radial basis function networks},
   Year 	= {2000} }


% 55) Record # 430
@inproceedings{Jia98,
   Author	= {Jia, Chunfu},
   Title 	= {Stochastic single machine scheduling with a general objective function},
   BookTitle	= {Decision and Control, 1998. Proceedings of the 37th IEEE Conference on},
   Volume	= {2},
   Pages	= {2166-2170},
   Abstract	= {We consider the problem of scheduling n jobs on a single machine which is subject to stochastic breakdowns to minimize the expectation of the linear combination of three functions of job completion times: (i) the weighted sum of the squares, (ii) the square of the weighted mean and (iii) the weighted mean. Many regular and irregular objective functions are the particular cases of this general objective function. The deterministic equivalent objective function of this problem is derived when the counting process N(t) describing the number of the machine breakdowns is a generalized Poisson process. For the two cases: (a) the processing times of the jobs are equal and (b) the weights of the jobs are proportional to their processing times, several properties of the optimal sequences of the problem are developed},
   Keywords	= {production control, stochastic processes},
   Year 	= {1998} }


% 56) Record # 429
@article{Kalluri+Arce98,
   Author	= {Kalluri, S. and Arce, G.R.},
   Title 	= {Adaptive weighted myriad filter algorithms for robust signal processing in &alpha;-stable noise environments},
   Journal	= {Signal Processing, IEEE Transactions on},
   Volume	= {46},
   Pages	= {322-334},
   Abstract	= {Stochastic gradient-based adaptive algorithms are developed for the optimization of weighted myriad filters (WMyFs). WMyFs form a class of nonlinear filters, motivated by the properties of &alpha;-stable distributions, that have been proposed for robust non-Gaussian signal processing in impulsive noise environments. The weighted myriad for an N-long data window is described by a set of nonnegative weights {w<sub>i </sub>}<sub>i=l</sub><sup>N</sup> and the so-called linearity parameter K&gt;0. In the limit, as K&rarr;&infin;, the filter reduces to the familiar weighted mean filter (which is a constrained linear FIR filter). Necessary conditions are obtained for optimality of the filter weights under the mean absolute error criterion. An implicit formulation of the filter output is used to find an expression for the gradient of the cost function. Using instantaneous gradient estimates, an adaptive steepest-descent algorithm is then derived to optimize the weights. This algorithm involves a very simple update term that is computationally comparable to the update in the classical LMS algorithm. The robust performance of this adaptive algorithm is demonstrated through a computer simulation example involving lowpass filtering of a one-dimensional chirp-type signal in impulsive noise},
   Keywords	= {FIR filters, adaptive filters, adaptive signal processing, circuit optimisation, filtering theory, noise, nonlinear filters, optimisation, statistical analysis},
   Year 	= {1998} }


% 57) Record # 428
@article{Yager96,
   Author	= {Yager, R.R.},
   Title 	= {On mean type aggregation},
   Journal	= {Systems, Man and Cybernetics, Part B, IEEE Transactions on},
   Volume	= {26},
   Pages	= {209-221},
   Abstract	= {We introduce and define the concept of mean aggregation of a collection of n numbers. We point out that the lack of associativity of this operation compounds the problem of the extending mean of n numbers to n+1 numbers. The closely related concepts of self identity and the centering property are introduced as one imperative for extending mean aggregation operators. The problem of weighted mean aggregation is studied. A new concept of prioritized mean aggregation is then introduced. We next show that the technique of selecting an element based upon the performance of a random experiment can be considered as a mean aggregation operation},
   Keywords	= {fuzzy logic},
   Year 	= {1996} }


% 58) Record # 427
@misc{Yang+Lin94,
   Author	= {Yang, C.-Y. and Lin, J.-C.},
   Title 	= {Use of radius weighted mean to cluster two-class data},
   Volume	= {30},
   Number	= {10},
   Pages	= {757-759},
   Abstract	= {A new method using the radius weighted mean to cluster two-class data is proposed. Experiments show that the clustering results are good, the computation is fast, and the method is easy to implement. The method can be applied to block truncation coding, codebook generation, and decision tree construction},
   Keywords	= {block codes, image coding, pattern recognition, vector quantisation},
   Year 	= {1994} }


% 59) Record # 426
@inproceedings{Yager02,
   Author	= {Yager, R.R. and Kreinovich, V.},
   Title 	= {Main ideas behind OWA lead to a universal and optimal approximation scheme},
   BookTitle	= {Fuzzy Information Processing Society, 2002. Proceedings. NAFIPS. 2002 Annual Meeting of the North American},
   Pages	= {428-433},
   Year 	= {2002} }


% 60) Record # 425
@inproceedings{Rybalov+Yager01,
   Author	= {Rybalov, A. and Yager, R.R.},
   Title 	= {Controlled clustering, uni-norm operators and OWA operators},
   BookTitle	= {IFSA World Congress and 20th NAFIPS International Conference, 2001. Joint 9th},
   Volume	= {4},
   Pages	= {1935-1939},
   Abstract	= {Clustering processes now have widespread applications. Their purpose is to separate data into groups of similar characteristics. Usually these processes are data driven, and, thus, we don't have effective mechanism to control them. The standard procedure is to set the number of clusters (in supervised clustering we can also set centers of clusters). But as soon as we fix the number of clusters we don't have further control on the number of points in each cluster. So, the problem now is how to manage the distribution of points. The distribution of points in clusters reflects the level of concentration: if almost all points are in one cluster then the level of concentration is very high; if points are equally distributed across clusters then the level of concentration is low. Therefore, the first problem is to find the way to measure the level of concentration. After this we proceed to describe the clustering process that permits us to control concentration. We then apply uni-norm operators and OWA operators to managing of the clustering process},
   Keywords	= {artificial intelligence, pattern clustering},
   Year 	= {2001} }


% 61) Record # 424
@article{Yager+Filev99,
   Author	= {Yager, R.R. and Filev, D.P.},
   Title 	= {Induced ordered weighted averaging operators},
   Journal	= {Systems, Man and Cybernetics, Part B, IEEE Transactions on},
   Volume	= {29},
   Pages	= {141-150},
   Abstract	= {We briefly describe the Ordered Weighted Averaging (OWA) operator and discuss a methodology for learning the associated weighting vector from observational data. We then introduce a more general type of OWA operator called the Induced Ordered Weighted Averaging (IOWA) Operator. These operators take as their argument pairs, called OWA pairs, in which one component is used to induce an ordering over the second components which are then aggregated. A number of different aggregation situations have been shown to be representable in this framework. We then show how this tool can be used to represent different types of aggregation models},
   Keywords	= {artificial intelligence, cybernetics, fuzzy logic, inference mechanisms},
   Year 	= {1999} }


% 62) Record # 423
@article{,
   Author	= {Chen, Shuping and Zhou, Xun Yu},
   Title 	= {Stochastic Linear Quadratic Regulators with Indefinite Control Weight Costs II},
   Journal	= {SIAM Journal on Control and Optimization},
   Volume	= {39},
   Number	= {4},
   Pages	= {1065-1081},
   Abstract	= {In part I of this paper [S. Chen, X. Li, and X. Zhou, SIAM J. Control Optim., 36 (1998), pp. 1685--1702], an optimization model of stochastic linear quadratic regulators (LQRs) with indefinite control cost weighting matrices is proposed and studied. In this sequel, the problem of solving LQR models with system diffusions dependent on both state and control variables, which is left open in part I, is tackled. First, the solvability of the associated stochastic Riccati equations (SREs) is studied in the normal case (namely, all the state and control weighting matrices and the terminal matrix in the cost functional are nonnegative definite, with at least one positive definite), which in turn leads to an optimal state feedback control of the LQR problem. In the general indefinite case, the problem is decomposed into two optimal LQR problems, one with a forward dynamics and the other with a backward dynamics. The well-posedness and solvability of the original LQR problem are then obtained by solving these two subproblems, and an optimal control is explicitly constructed. Examples are presented to illustrate the results.},
   Keywords	= {stochastic linear quadratic regulator, well-posedness, stochastic Riccati equation, backward stochastic differential equation},
   Year 	= {1998} }


% 63) Record # 422
@article{,
   Author	= {Chen, Shuping and Li, Xunjing and Zhou, Xun Yu},
   Title 	= {Stochastic Linear Quadratic Regulators with Indefinite Control Weight Costs},
   Journal	= {SIAM Journal on Control and Optimization},
   Volume	= {36},
   Number	= {5},
   Pages	= {1685-1702},
   Abstract	= {This paper considers optimal (minimizing) control of stochastic linear quadratic regulators (LQRs). The assumption that the control weight costs must be positive definite, inherited from the deterministic case, has been taken for granted in the literature. It is, however, shown in this paper that some stochastic LQR problems with indefinite (in particular, negative) control weight costs may still be sensible and well-posed due to the deep nature of stochastic systems. New stochastic Riccati equations, which are backward stochastic differential equations involving complicated nonlinear terms, are presented and their solvability is proved to be sufficient for the well-posedness and the solutions of the optimal LQR problems. Existence and uniqueness of solutions to the Riccati equation for a special case are obtained. Finally, it is argued that, quite contrary to the deterministic systems, the stochastic maximum principle cannot fully characterize the optimality of the stochastic LQR problems.},
   Keywords	= {stochastic linear quadratic regulator, well-posedness, stochastic Riccati equation, backward stochastic differential equation, maximum principle},
   Year 	= {1998} }


% 64) Record # 421
@article{,
   Author	= {Forsgren, Anders and Sporre, Göran},
   Title 	= {On Weighted Linear Least-Squares Problems Related to Interior Methods for Convex Quadratic Programming},
   Journal	= {SIAM Journal on Matrix Analysis and Applications},
   Volume	= {23},
   Number	= {1},
   Pages	= {42-56},
   Abstract	= {It is known that the norm of the solution to a weighted linear least-squares problem is uniformly bounded for the set of diagonally dominant symmetric positive definite weight matrices. This result is extended to weight matrices that are nonnegative linear combinations of symmetric positive semidefinite matrices. Further, results are given concerning the strong connection between the boundedness of weighted projection onto a subspace and the projection onto its complementary subspace using the inverse weight matrix. In particular, explicit bounds are given for the Euclidean norm of the projections. These results are applied to the Newton equations arising in a primal-dual interior method for convex quadratic programming and boundedness is shown for the corresponding projection operator.},
   Keywords	= {unconstrained linear least-squares problem, weighted least-squares problem, quadra- tic programming, interior method},
   Year 	= {2001} }


% 65) Record # 420
@inproceedings{,
   Author	= {Houston, Paul},
   Title 	= {Analysis of solder paste release in fine pitch stencil printing processes},
   BookTitle	= {Surface Mount Technology Association International Conference (SMTA02)},
   Address	= {Boston, MA},
   Abstract	= {Advanced electronics packaging technologies such as chip scale packages, fine pitch ball grid arrays, 0201?s, and flip chip are pushing solder paste stencil printing to the limit. In order to achieve solder print deposits of the sizes required for emerging electronic packaging technology, a rigorous understanding of the process is required. Stencil printing is a critical step in surface mount assembly processing and becomes increasingly challenging as packages shrink in size, increase in lead count and require closer lead spacing (finer pitch). It is well documented that stencil printing can account for more than 50 percent of the defects generated during surface mount assembly processing. Although several investigations have been attempted in order to better understand and analyze the fine pitch stencil printing process, its sheer complexity, the large number of process variables, the complex nature of the solder paste suspension flow, and the exceedingly small printed volume make this task difficult. This work seeks to expand our understanding of the physical characteristics of stencil printing; specifically focusing on the solder paste release process based on experimental and analytical approaches. This paper seeks to expand our understanding of the physical characteristics of stencil printing specifically focusing on the solder paste release process based on experimental and analytical approaches. First, designed experiments were conducted to identify the main process variables affecting final print quality. An in-situ measurement system using a high speed imaging system monitored the solder paste release process. Based on experimental observations, different modes of solder paste release and their corresponding mechanisms were identified and a model was developed to predict print quality for fine pitch applications. The proposed model was experimentally verified showing good agreement with measured values for fine pitch and very fine pitch printing. It was found that the cohesive and adhesive forces acting on the paste tend to govern the release process rather than the viscous and inertial forces. Finally, a case study of stencil printing fine pitch 0201 components is presented. The results confirm the finding of the overall analysis.},
   Keywords	= {stencil printing, fine pitch, paste release, 0201 processing.},
   Year 	= {2002} }


% 66) Record # 419
@inproceedings{,
   Author	= {Byle, Fritz},
   Title 	= {Solder paste printing data analysis: a visual approach},
   BookTitle	= {Surface Mount Technology Association International Conference (SMTA02)},
   Address	= {Boston, MA},
   Abstract	= {The advent of high-speed solder paste volume measurement systems has led to the capability of rapidly generating more data than it is possible to conveniently analyze. This paper presents a simple yet powerful methodology for assessing the performance of the paste printing process, as well as assessing the repeatability of 3-D paste measurement instruments. The technique discussed in this paper takes advantage of the power of graphical data representations to enable rapid assessment of process performance. The technique can be applied to data from virtually any 3-D paste measurement system using off-the shelf software, and could be incorporated into such systems easily.},
   Keywords	= {solder paste, printing, measurement, analysis.},
   Year 	= {2002} }


% 67) Record # 418
@inproceedings{,
   Author	= {Shaherwala, Sharafali and Manjeshwar, Praveen Kumar and Craik, Jorge and Kirby, Stephen and Phadnis, Sachin and Srihari, K.},
   Title 	= {Qualification of 3-d solder paste inspection systems for effective in-line process control},
   BookTitle	= {Surface Mount Technology Association International Conference (SMTA02)},
   Address	= {Boston, MA},
   Abstract	= {The assembly of Printed Circuit Boards (PCBs) consists of several processes and sub-processes. Literature and experience suggests that solder paste deposition during stencil printing is the primary cause of defects [3]. Therefore, an organization must encompass robust processes such that the occurrence of defects is prevented. Process control entails understanding the manufacturing process and its variation along with the variation of the measurement systems employed. Automated solder paste inspection with 100% board and component coverage is relatively new to the Surface Mount Technology (SMT) industry.This paper addresses the approach to quantify variation in the measurement system. A scientific and systematic methodology to analyze a 3-D automated solder paste inspection system based on Measurement System Analysis (MSA) studies is delineated. As part of the MSA study, standard approaches have been developed for conducting accuracy analyses, linearity studies, and Gage Repeatability and Reproducibility (GR&R) analyses for automated solder paste inspection equipment. The approach suggested is validated by case studies on two sets of automated solder paste inspection equipment. Results of the case study are discussed.},
   Keywords	= {automated solder paste inspection, process control, measurement system analysis},
   Year 	= {2002} }


% 68) Record # 417
@article{,
   Author	= {Presman, E. L.},
   Title 	= {Optimality Almost Surely and in Probability for a Stochastic Linearly Quadratic Regulator},
   Journal	= {Theory of Probability & Its Applications},
   Volume	= {42},
   Number	= {3},
   Abstract	= {The stochastic linear quadratic regulator with constant coefficients is considered in continuous time when the horizon tends to infinity. It is shown that the feedback control, which is optimal for the infinite time horizon in the corresponding deterministic problem is optimal in probability for any rate function which tends to zero and almost sure for any power rate function with negative degree.},
   Keywords	= {linear quadratic regulator, optimality almost surely,optimality in probability, stabilizability, detectability},
   Year 	= {1998} }


% 69) Record # 416
@article{,
   Author	= {Bailey, Christopher and Lu, Hua and Glinski, Greg and Wheeler, Daniel and Hamilton, Phil and Hendriksen, Mike and Smith, Brian},
   Title 	= {Using computer models to identify optimal conditions for flip-chip assembly and reliability},
   Journal	= {Circuit World},
   Volume	= {28},
   Number	= {1},
   Pages	= {14 - 20},
   Abstract	= {Flip-chip assembly, developed in the early 1960s, is now being positioned as a key joining technology to achieve high-density mounting of electronic components on to printed circuit boards for high-volume, low-cost products. Computer models are now being used early within the product design stage to ensure that optimal process conditions are used. These models capture the governing physics taking place during the assembly process and they can also predict relevant defects that may occur. Describes the application of computational modelling techniques that have the ability to predict a range of interacting physical phenomena associated with the manufacturing process. For example, in the flip-chip assembly process we have solder paste deposition, solder joint shape formation, heat transfer, solidification and thermal stress. Illustrates the application of modelling technology being used as part of a larger UK study aiming to establish a process route for high-volume, low-cost, sub-100- micron pitch flip-chip assembly.},
   Keywords	= {Flip Chip, Solder Paste, Reflow, Underfill, Reliability, Modelling},
   Year 	= {2002} }


% 70) Record # 415
@article{,
   Author	= {Mannan, S. H. and Ekere, N. N. and Ismail, I. and Currie, M. A.},
   Title 	= {Flow processes in solder paste during stencil printing for surface mount technology assembly},
   Journal	= {Journal of Materials Science: Materials in Electronics},
   Volume	= {6},
   Pages	= {34- 42},
   Abstract	= {Solder paste is used for reflow soldering of Surface Mount Devices (SMDs). In this paper, the authors discuss how the various stages of the stencil printing cycle affect the rheol. properties of the solder paste. First, the heat generated in the paste roll is examined to see what effect it has on solder paste rheol., then the authors analyze in detail the process of paste withdrawal from a metal mask stencil and discuss those properties of solder paste that lead to a good print in terms of the size and shape of the solder paste particles, and their packing. In order to do this, they review some of the expts. and phenomena that have been shown to occur in dense suspensions, and see what aspects of that work are applicable to solder paste printing.},
   Year 	= {1995} }


% 71) Record # 414
@incollection{Nguty+Ekere99,
   Author	= {Nguty, Tennyson A. and Ekere, Ndy N.},
   Title 	= {The rheological properties of solder and solar pastes and the effect on stencil printing},
   BookTitle	= {Rheologica Acta},
   Editor	= {Springer-Verlag},
   Publisher	= {Springer-Verlag},
   Address	= {Berlin Heidelberg},
   Volume	= {39, Issue 6},
   Pages	= {607-612},
   Abstract	= {Solar and solder pastes are widely used in the electronics industry. Solder paste is the principal joining medium in the assembly of surface mount components, whilst solar paste is used in the manufacture of semiconductor solar cells in the photo-voltaic industry. The stencil printing of both solder and solar pastes is a very important and critical stage in the assembly process. With miniaturisation of components, this is likely to continue. The challenge in stencil printing at such dimensions is in achieving repeatable deposition of both solar and solder pastes from print to print. To meet this challenge requires an understanding of the flow behaviour of both solar and solder pastes. The rheological properties of solar and solder pastes have been evaluated through three different types of experiments. Existing models were applied to compare their rheological behaviour under these schemes. One striking difference was that solar paste showed a higher viscosity than solder paste. Both solar and solder pastes were found to be non-Newtonian materials, showing a decrease in viscosity with increasing shear rates. In this paper we investigate the rheological properties of both solder and solar paste under steady shear and creep-recovery tests.},
   Keywords	= {Solar paste, Solder paste, Rheology, Creep recovery, Viscosity, Solar cells, Steady shear},
   Year 	= {1999} }


% 72) Record # 413
@book{,
   Author	= {Proth, Jean-Marie and Xie, Xiaolan},
   Title 	= {Petri nets : a tool for design and management of manufacturing systems},
   Publisher	= {Wiley},
   Address	= {New York},
   Keywords	= {Flexible manufacturing systems Mathematical models, Petri nets, Production control Mathematical models},
   Year 	= {1996} }


% 73) Record # 411
@inproceedings{,
   Author	= {Jackson, G.J. and Hendriksen, M.W. and Lu, H. and Fkere, N.N.},
   Title 	= {Experimental and computational modelling characterisation of fine particle Pb-free solder paste volumes for flip chip assembly applications},
   BookTitle	= {Electronics Manufacturing Technology Symposium, 2002. IEMT 2002. 27th Annual IEEE/SEMI International},
   Pages	= {304-309},
   Abstract	= {Advanced flip-chip technology is the key technique used to achieve a high-density assembly of components onto printed circuit boards (PCB). Increasing demands are being made on electronics manufacturers to use flip chip components with greater input/output capabilities at pitches below 0.100 mm for their future applications. Furthermore, the advancement in this technology is challenged by the requirement to use new Pb-free materials for interconnections; this being driven by the European directive, Waste from Electronic and Electrical Equipment (WEEE) that necessitates the elimination of lead containing materials from electronics products by January 2006. The advancements in flip chip technology place a requirement for ultra small solder volumes in joint interconnection. Volume also plays a significant role towards the long-term reliability of the joints. Computational modelling can yield reliability data and required solder volumes for flip chip interconnection. However, in order to implement small solder volumes into a flip chip assembly process, a firm understanding of the formation and subsequent behaviour throughout the process is required. In this investigation, stencil printing of Pb-free solder paste via small stencil apertures, required for ultra fine pitch flip-chip applications, is reported, highlighting the issues encountered at such small geometries.},
   Keywords	= {circuit reliability;  fine-pitch technology;  flip-chip devices;  printed circuit manufacture;  reflow soldering;  waste disposal},
   Year 	= {2002} }


% 74) Record # 409
@inproceedings{,
   Author	= {Kumar, Manjeshwar Praveen and Shaherwala, Sharafali and Craik, Jorge and Phadnis, Sachin and Srihari, K.},
   Title 	= {Optimizing Solder Paste Deposition For A High Volume - Low Mix Smt Line},
   BookTitle	= {Industrial Engineering Research Conference 2002},
   Address	= {Orlando, FL},
   Abstract	= {The assembly of Printed Circuit Boards (PCBs) consists of numerous processes and sub-processes. Literature and experience have suggested that solder paste deposition during stencil printing is the primary cause of defects. Therefore, an organization must encompass robust processes such that occurrence of defects is prevented, thereby enhancing throughput and process yields. Initial experiments conducted focused towards characterizing the 3D solder paste measurement system. Subsequently, systematic designed experiments were employed and the response variables, notably the height and volume of paste deposition, were statistically analyzed in order to arrive at an optimum paste deposition process.},
   Keywords	= {Design of Experiments, Gage Repeatability and Reproducibility, Surface Mount Technology, Stencil Printing},
   Year 	= {2002} }


% 75) Record # 408
@article{Yii+Morad+Hitam01,
   Author	= {Yii, Hee Kim and Morad, Norhashimah and Hitam, Muhammad Suzuri},
   Title 	= {Optimisation of a Solder Paste Printing Process Parameters Using a Hybrid Intelligent Approach},
   Journal	= {Neural Network World},
   Volume	= {11},
   Number	= {2},
   Pages	= {109-127},
   Abstract	= {This paper describes a method of modelling and optimising the solder paste printing process using an artificial intelligence approach. A hybrid approach combining the backpropagation neural network and genetic algorithm to model and subsequently optimise the process is developed using actual data collected from a manufacturing plant. Results obtained showed that the neural network developed was able to model the process successfully and the genetic algorithm developed was able to optimise the process parameters using various optimisation criteria.},
   Keywords	= {Solder paste printing process, neural networks, genetic algorithms, bootstrap method, multiple regression method, multi-objective optimisation},
   Year 	= {2001} }


% 76) Record # 407
@inproceedings{Aravamudhan02,
   Author	= {Aravamudhan, S. and Santos, D. and Pham-Van-Diep, G. and Andres, F.},
   Title 	= {A study of solder paste release from small stencil apertures of different geometries with constant volumes},
   BookTitle	= {Electronics Manufacturing Technology Symposium, 2002. IEMT 2002. 27th Annual IEEE/SEMI International},
   Pages	= {159-165},
   Abstract	= {Stencil printing is a critical first step in surface mount assembly. It is often cited that about 50% or more of the defects found in the assembly of PCBs are attributed to stencil printing. Manufacturing techniques for the assembly of certain flip chips, chip scale packages and fine pitch ball grid arrays are testing the limits of current stencil printing capabilities. A thorough understanding of basic stencil printing principles would facilitate the design of printers, stencils and pastes, and would ultimately permit the extension of reliable print techniques to the very fine print arena. For small apertures, solder paste volume and consistency are critical to solder joint reliability. The work described in this paper examines the release performance of various solder pastes from a variety of aperture sizes and geometries. The focus of this study is a comparison of square versus circular apertures when the nominal volume of paste to be deposited is kept constant. This method of study is contrasted with published work wherein squares versus circles have been studied, but, in those, the dimensions (not volumes) were the same (e.g., 12 mil diameter circle as compared to a 12 mil (on a side) square aperture).},
   Keywords	= {Stencil Printing, Fine Feature, CSP, Flip Chips, Square vs. Circle},
   Year 	= {2002} }


% 77) Record # 406
@book{Demuth00,
   Author	= {Demuth, Howard and Beale, Mark},
   Title 	= {Neural network toolbox: for use with MATLAB, user's guide, version 4},
   Publisher	= {MathWorks},
   Address	= {Natick, MA},
   Note 	= {http://www.mathworks.com/products/neuralnet/},
   Year 	= {2000} }


% 78) Record # 405
@inproceedings{Hong97,
   Author	= {Hong, Jee Min and Lee, Sung Han and Lee, Beom Hee},
   Title 	= {A hierarchical optimization method in the PCB assembly for surface mounting machines},
   BookTitle	= {Industrial Electronics, 1997. ISIE '97., Proceedings of the IEEE International Symposium on},
   Volume	= {1},
   Pages	= {129-134},
   Abstract	= {An hierarchical optimization method to improve efficiency of the surface mounting machines (SMM) in PCB assembly is presented. To minimize the setup time, an automatic CAD data conversion system and a database system of components are proposed, which automatically generate the data for pick and place sequences from the CADSTAR output files. For maximization of the efficiency of operations, an effective assignment algorithm for heads and nozzles and an effective arrangement algorithm for feeders are proposed. Finally, a modified effective heuristic algorithm for traveling path of heads is also proposed, which is based on the traveling salesman problem (TSP) solution technique. The proposed algorithms are tested through simulations on the assembly tasks of PCBs actually manufactured. It is shown that the proposed algorithms reduce the time required to perform the assembly sequences by up to 40 percent compared to the randomly generated sequences.},
   Keywords	= {printed circuit manufacture, surface mounting machines, PCB assembly tasks, hierarchical optimization method, automatic CAD data conversion system, database system, pick and place sequences, CADSTAR output files, CAD/CAM, assignment algorithm, arrangement algorithm, heuristic algorithm, traveling path, traveling salesman problem, optimal control design, control simulation},
   Year 	= {1997} }


% 79) Record # 404
@inproceedings{Pang00,
   Author	= {Pang, H.L.J. and Ang, K.H. and Shi, X.Q. and Wang, Z.P.},
   Title 	= {Methodology for a highly accelerated solder joint reliability test},
   BookTitle	= {Electronics Packaging Technology Conference, 2000. (EPTC 2000). Proceedings of 3rd},
   Editor	= {Beng, L.T. and Lee, C. and Chuan, T.K.},
   Pages	= {385-390},
   Abstract	= {A thermo-mechanical deflection system (TMDS) test method has been developed for evaluating the fatigue performance of solder joints in printed circuit board (PCB) assemblies. The TMDS test imparts cyclic twisting deflections on an assembled PCB test vehicle which is tested under controlled isothermal conditions in a thermal chamber. Tests were conducted at various angles of twist and isothermal conditions at 100/spl deg/C and 25/spl deg/C. Failure analysis using SEM showed that the solder joint failure for the TMDS test is comparable to the failure mechanisms for accelerated thermal cycling (ATC) test failures for solder joints. Weibull failure distribution plots for TMDS and ATC tests were compared and a scale factor (SF) was used to correlate the test results.},
   Keywords	= {circuit reliability, failure analysis, printed circuit testing, soldering, assembling, life testing, fatigue, Weibull distribution, highly accelerated solder joint reliability test, thermo-mechanical deflection system, TMDS test method, fatigue performance, solder joints, printed circuit board, PCB assemblies, TMDS test, cyclic twisting deflections, assembled PCB test vehicle, controlled isothermal conditions, thermal chamber, twist angles, isothermal conditions, failure analysis, SEM, solder joint failure, failure mechanisms, accelerated thermal cycling test failures, Weibull failure distribution plots, scale factor, test result correlation, 100 C, 25 C},
   Year 	= {2000} }


% 80) Record # 403
@inproceedings{Van-Hop00a,
   Author	= {Van-Hop, Nguyen and Tabucanon, M.T. and Minh, Do Quang},
   Title 	= {PCB assembly sequence and feeder assignment problem for the case of Tchebyshev robot arm motion. I. Basic problem},
   BookTitle	= {Management of Innovation and Technology, 2000. ICMIT 2000. Proceedings of the 2000 IEEE International Conference on},
   Volume	= {2},
   Pages	= {919-924},
   Abstract	= {This paper considers a basic problem in printed circuit board (PCB) assembly planning for the case of Tchebyshev robot arm motion in which it will be used for the other problems. In this problem, the assembly sequence is determined when feeder rack travel with infinite speed and the board is fixed. The problem is analyzed and converted into a shortest path problem of a corresponding interval graph that is proved to be NP-complete. Therefore, a heuristic procedure is developed based on network theory and interval graph. This heuristic is tested and found to give the closed optimal solution.},
   Keywords	= {printed circuit manufacture, industrial robots, computational complexity, optimisation, assembly planning, PCB assembly sequence, feeder assignment problem, Tchebyshev robot arm motion, PCB assembly planning, feeder rack travel, infinite speed, shortest path problem, interval graph, NP-complete, heuristic procedure, network theory, closed optimal solution, dynamic pick and place, fixed pick and place},
   Year 	= {2000} }


% 81) Record # 402
@inproceedings{Van-Hop00b,
   Author	= {Van-Hop, Nguyen and Tabucanon, M.T. and Minh, Do Quang},
   Title 	= {PCB assembly sequence and feeder assignment problem for the case of Tchebyshev robot arm motion. II. Models development},
   BookTitle	= {Management of Innovation and Technology, 2000. ICMIT 2000. Proceedings of the 2000 IEEE International Conference on},
   Volume	= {2},
   Pages	= {925-930},
   Abstract	= {This paper continues part I to develop models and solutions for printed circuit board (PCB) assembly sequence and feeder assignment problems in the case of Tchebyshev robot arm motion. The problem is decomposed into sub-problems of feeder assignment and assembly sequence separately and the combined one under different scenarios of machine settings. The analysis of the problem leads to a number of nonlinear multiple objective decision making (MODM) models. These models are linearized and solved by heuristics using the solution procedure in part I and some standard techniques.},
   Keywords	= {printed circuit manufacture, assembly planning, industrial robots, decision theory, PCB assembly sequence, feeder assignment, Tchebyshev robot arm motion, models development, sub-problems, machine settings, nonlinear multiple objective decision making models, heuristics, PCB assembly planning},
   Year 	= {2000} }


% 82) Record # 401
@article{Ellis01,
   Author	= {Ellis, K.P. and Vittes, F.J. and Kobza, J.E.},
   Title 	= {Optimizing the performance of a surface mount placement machine},
   Journal	= {Electronics Packaging Manufacturing, IEEE Transactions on [see also Components, Packaging and Manufacturing Technology, Part C: Manufacturing, IEEE Transactons on]},
   Volume	= {24},
   Number	= {3},
   Pages	= {160-170},
   Abstract	= {Process planning is an important and integral part of effectively operating a printed circuit board (PCB) assembly system. A PCB assembly system generally consists of different types of placement machines, testing equipment, and material handling equipment. This research develops a new solution approach to determine the component placement sequence and feeder arrangement for a turret style surface mount-placement machine often used in PCB assembly systems. This solution approach can be integrated into a process planning system to reduce assembly time and improve productivity. The algorithm consists of a construction procedure that uses a set of rules to generate an initial component placement sequence and feeder arrangement along with an improvement procedure to improve the initial solution. An industrial case study conducted at Ericsson, Inc., using a Fuji CP4-3 machine and actual PCB data, is presented to demonstrate the performance of the proposed solution approach. The solutions obtained using the proposed solution approach are compared to those obtained using state of the art PCB assembly process optimization software. For all PCBs in the case study, the proposed solution approach yielded lower placement times than the commercial software, thus generating additional valuable production capacity. This research is applicable for both researchers and practitioners in printed circuit board assembly systems.},
   Keywords	= {assembly planning, printed circuit manufacture, surface mount technology, optimisation, assembly time, process planning, PCB assembly system, component placement sequence, feeder arrangement, turret style surface mount-placement machine, productivity, construction procedure, initial component placement sequence, Ericsson, Fuji CP4-3 machine, placement times, production capacity},
   Year 	= {2001} }


% 83) Record # 400
@article{Li+Mahajan94,
   Author	= {Li, Y. and Mahajan, R.L. and Tong, J.},
   Title 	= {Design factors and their effect on PCB assembly yield-statistical and neural network predictive models},
   Journal	= {Components, Packaging, and Manufacturing Technology, Part A, IEEE Transactions on [see also Components, Hybrids, and Manufacturing Technology, IEEE Transactions on]},
   Volume	= {17},
   Number	= {2},
   Pages	= {183-191},
   Abstract	= {This study relates circuit board design features to assembly yields. Data used were collected over a period of one year from two circuit board assembly shops at AT&T. Design parameters that may affect the assembly yield were identified using knowledge of the assembly process. These parameters were then quantified for a set of board designs and related to the actual assembly yield by the statistical regression models and the artificial neural network (ANN) models. These models are able to predict the assembly yield with a root mean square (RMS) error of less than 5%. They can be used to predict the assembly yield for new board designs on the same line. Alternatively, they can be used to compare the performance of different lines by comparing the expected yield for a given design with the actual yield.},
   Keywords	= {printed circuit manufacture, printed circuit design, neural nets, modelling, statistical analysis, design factors, PCB assembly yield, statistical models, neural network predictive models, circuit board design features, assembly yields, circuit board assembly shops, AT&T, design parameters, assembly yield, assembly process, board designs, statistical regression models, artificial neural network models, root mean square error},
   Year 	= {1994} }


% 84) Record # 399
@inproceedings{Marin02,
   Author	= {Marin, A. and Svasta, P. and Simion-Zanescu, D.},
   Title 	= {Theoretical and experimental aspects in the depositing process of solder and adhesive pastes in surface mount technology},
   BookTitle	= {Polymers and Adhesives in Microelectronics and Photonics, 2002. POLYTRONIC 2002. 2nd International IEEE Conference on},
   Pages	= {150-154},
   Abstract	= {The paper contributes to a detailed comparison of some materials, like solder pastes and conductive adhesives, used in the assembling technology process of the electronic components, on interconnecting supports. The study dealt also with the analyze of different geometrical configurations, in the depositing processes of the above-mentioned materials. The goal is to determine an optimum correlation of the functional parameters, for the depositing process, in realizing prototype and low manufacturing series applications. The study is focused only on the technology process in depositing materials, for interconnecting components and electronic modules, the other steps in the technological flow being considered only like input and output data. From all known technological processes, it was selected the one adapted to our purpose and it were established the necessary physical and technical parameters. By these means, we have studied the physical properties of the materials, pointing out their characteristics and the influence of these ones on the depositing process. It were made critical observations, concerning the validity of the proposed models and it were pointed out the further researches that we must conduct, in order to obtain better practical results.},
   Keywords	= {surface mount technology, adhesives, reflow soldering, rheology, surface tension, viscosity, non-Newtonian flow, polymer melts, conducting polymers, filled polymers, printed circuit manufacture, solder pastes, conductive adhesives, assembling technology, interconnecting supports, geometrical configurations, depositing processes, optimum correlation, functional parameters, low manufacturing series applications, prototype applications, electronic modules, physical properties, surface mount technology, wetting capability, interfacial energies, PCB, nonNewtonian flow, yield stress, shear stress, plastic Bingham material, pseudoplastic model, solder paste dispensing},
   Year 	= {2002} }


% 85) Record # 397
@inproceedings{Pham-Van-Diep02,
   Author	= {Pham-Van-Diep, Gerald},
   Title 	= {Real time visualization and prediction of solder paste flow in the circuit board print operation},
   BookTitle	= {Advanced Technology Symposium},
   Editor	= {SMTA},
   Address	= {Boston, MA},
   Publisher	= {SMTA},
   Pages	= {41-49},
   Abstract	= {Three studies are undertaken to understand the dependence of aperture fill and stencil release on solder paste print definition. The first study focuses on the role of pastes. Seven pastes are compared and ranked by release performance. Second, three stencil-forming techniques are compared. Chemical etch, laser machined and electro-formed stencils from two manufacturers are studied to determine critical design parameters. Third, a model describing the release mechanism including sheer and adhesion forces is developed and compared to experimental results. Additionally, a real-time visualization technique and a model for solder paste flow into stencil apertures during the squeegee operation are described and results are discussed.},
   Keywords	= {Surface Mount, Fine Feature, Transfer Efficiencies, Solder Paste, Stencil Printing},
   Year 	= {2002} }


% 86) Record # 396
@article{Wang93,
   Author	= {Wang, Chunqing and Zhongguo Jixie, Gongcheng},
   Title 	= {Real time quality monitor and control of the SMT laser microsolder joints},
   Journal	= {Zhongguo Jixie Gongcheng/China Mechanical Engineering},
   Volume	= {4},
   Number	= {6},
   Pages	= {9-11},
   Abstract	= {In this paper, a new type of system has been developed for monitoring and controlling the quality of SMT laser microsolder joints in the soldering process, and a separated laser heating and infrared detecting unit has been designed in which the InSb thermoelectric pickup was adopted as the infrared detector cell. The experiment results show that the infrared radiation signal from the soldering joints includes the useful information of the heating and melting process of the solder paste. A microcomputer quality monitor and closed-loop control method has been achieved tentatively. (Translated author abstract) 3 Refs.},
   Keywords	= {Soldered joints,  Surface mount technology,  Soldering,  Monitoring,  Quality control,  Process control,  Infrared detectors,  Control systems,  Real time systems,  Soldering alloys,  Heating,  Melting,  Laser applications,  Laser microsoldering,  Closed loop control method,  Indium antimonide thermoelectric pickup},
   Year 	= {1993} }


% 87) Record # 395
@article{Suppelsa91,
   Author	= {Suppelsa, A. B.  and Liebman, H. F.},
   Title 	= {Successful implementation of closed loop semi-aqueous cleaning},
   Journal	= {Proceedings of the Technical Program National Electronic Packaging and Production Conference},
   Volume	= {1},
   Pages	= {557-565},
   Abstract	= {Following extensive materials and process testing, and equipment development, a Closed Loop spray cleaning cell utilizing the Semi-Aqueous, Terpene hydro-carbon BioAct EC7R, has been installed at the Motorola Inc., Communications Manufacturing Facility, at Plantation, Florida. This cleaning cell, which represents the present best viable alternative to CFC cleaning, is now being used to clean and to remove post reflow solder paste residues from soldered surface mount PCBs used in portable communications equipment. This paper will report the system development, production implementation and use history to date, review the terpene technology equipment developments to date, explain the environmental non-impact of system, outline the cleaning cell process philosophy and construction, and overall cleaning experience to date. (Author abstract) 58 Refs},
   Keywords	= {Printed Circuits,  Integrated Circuit Manufacture - Cleaning,  Solvents,  Hydrocarbons,  Soldering - Decontamination,  Semi-Aqueous Cleaning,  CFC,  Reflow Soldering,  PCB},
   Year 	= {1991} }


% 88) Record # 394
@article{,
   Author	= {Bodenstab, Jeff and Rob, Eng},
   Title 	= {Machine Vision for Electronics Manufacturing},
   Journal	= {Robotics Engineering},
   Volume	= {8},
   Number	= {9},
   Pages	= {2l-25},
   Abstract	= {Machine vision plays an integral role in many of today's manufacturing processes. In every major industry, vision systems can be found performing inspections, locating parts for assembly and sorting operations, and guiding robot movement. The benefits of machine vision are clear: when added to existing machinery, it provides closed-loop feedback; when incorporated in new machinery, it offers unprecedented accuracy; and when established in stand-alone inspection stations, it monitors high-speed machines to ensure quality production. The paper describes Standalone inspection system for surface mount devices (SMD). As an alternative to standalone inspection the paper describes the use of vision integrated assembly, in which inspection takes place after assembly but before solder flow.},
   Keywords	= {ROBOTS, INDUSTRIAL.,  Vision Systems.,  ELECTRONIC EQUIPMENT MANUFACTURE - Robot Applications.,  INSPECTION.,  MACHINE VISION TECHNOLOGY.,  SURFACE MOUNT DEVICES.},
   Year 	= {1996} }


% 89) Record # 393
@inproceedings{Kirmani94,
   Author	= {Kirmani, Shahzad F.  and Foote, Gerald D.},
   Title 	= {Solder paste critical parameter measurement in surface mount boards using model-based vision processing techniques},
   BookTitle	= {SME Technical Paper (Series) MS},
   Address	= {Minneapolis, MN, USA},
   Pages	= {1-8},
   Abstract	= {As the functionality and complexity of printed circuit boards increases, manufacturers are moving to surface mount technology with component lead pitches as low as 0.2 mm. Solder paste is deposited at widths of 100 microns and more, and has to be monitored for irregularities like bridges or insufficient solder deposition. Dimensional and volumetric measurements are also of interest and aid in providing a closed-loop control process for solder printing. Image processing techniques can be employed to measure critical solder paste parameters like height, volume, coverage and footprint area. This paper will discuss model-based image processing techniques for extracting solder paste information from images containing several solder pads. Methods of finding and processing solder pads, and other features of interest, will be discussed and sample images will be presented in the paper. (Author abstract) 7 Refs.},
   Keywords	= {Computer vision,  Surface mount technology,  Printed circuit manufacture,  Soldering alloys,  Inspection,  Process control,  Image processing,  Optics,  Integrated circuits,  Monitoring,  Size determination,  Closed loop control process,  Model based image processing,  Solder paste,  Solder pads},
   Year 	= {1994} }


% 90) Record # 392
@article{,
   Author	= {Whalley, David C. and Hyslop, Stuart M.},
   Title 	= {A simplified model of the reflow soldering process},
   Journal	= {Soldering & Surface Mount Technology},
   Volume	= {14},
   Number	= {1},
   Pages	= {30 - 37},
   Abstract	= {Previous models of temperature development during the reflow soldering process have typically used commercially available, general purpose, finite difference/finite element modelling tools to create detailed three dimensional representations of both the product and of the reflow furnace. Such models have been shown to achieve a high degree of accuracy in predicting the temperatures a particular PCB design will achieve during the reflow process, but are complex to generate and analysis times are long, even when using modern high performance computer workstations.This paper will report on the development of a simplified model of the process, which uses less complex representations of both the product and the process, together with a simple numerical solver developed specifically for this application, whilst achieving an accuracy comparable with more detailed models. In the simplified model, the product is divided into elements, which are represented using a two-dimensional mesh of thermal conductances linking thermal masses. The values of these conductances and masses are calculated based on the averaged properties of the PCB material and attached components within the area of each of the elements. The representation of the specific reflow furnace is based on measurements of the temperature and level of thermal convection at each point along the length of the furnace, thereby avoiding the necessity of making detailed measurements of the furnace geometry and air flow velocities. The combination of these two simplification techniques allow the reduction of analysis time for a relatively simple PCB from in the order of an hour on a high performance Unix workstation to under a second on a Pentium class PC running Microsoft Windows.},
   Keywords	= {Soldering, Reflow},
   Year 	= {2002} }


% 91) Record # 391
@article{Twomey96,
   Author	= {Twomey, J. M. Smith A. E.},
   Title 	= {Artificial neural network approach to the control of a wave soldering process},
   Journal	= {Intelligent Engineering Systems Through Artificial Neural Networks},
   Volume	= {6},
   Pages	= {889-894},
   Note   	= {ASME Fairfield NJ USA},
   Abstract	= {This research proposes a novel artificial neural network based approach for the control of wave soldering processes of electronic circuit boards. The network approach is committee networks by cross-validation. This method maximizes the use of the entire data set for model building and evaluation. The approach is compared to the two most common methods of building and evaluating neural networks. (Author abstract) 9 Refs.},
   Keywords	= {Soldering, Neural networks, Quality control, Optimization, Parameter estimation, Mathematical models, Wave soldering},
   Year 	= {1996} }


% 92) Record # 390
@inproceedings{Kim+Vachtsevanos00,
   Author	= {Kim, Wonoh and Vachtsevanos, G.},
   Title 	= {Hierarchical process control by combining SPC and soft computing methods},
   BookTitle	= {Fuzzy Information Processing Society, 2000. NAFIPS. 19th International Conference of the North American},
   Editor	= {Whalen, T.},
   Pages	= {485-489},
   Abstract	= {Statistical process control (SPC) provides methods of monitoring a system to improve the quality of the product. However, using SPC alone has limitations since it does not control a system but rather monitors it to remove the root causes. SPC and feedback control are combined in a hierarchical structure to monitor a system and use the information to compensate for deviations of the output of a system. Most industrial systems are composed of several constituent subsystems that are coupled. Large-scale system (LSS) theory and hierarchical control structure are used to not only optimize the recipe for the individual subsystems but also to optimize for the entire system. The proposed algorithm will be implemented in the controlled atmosphere brazing (CAB) furnace to braze aluminum heat exchange components.},
   Keywords	= {statistical process control, computerised monitoring, feedback, quality control, aluminium, electric furnaces, brazing, fuzzy control, hierarchical process control, SPC, soft computing methods, statistical process control, system monitoring, feedback control, hierarchical structure, industrial systems, constituent subsystems, large-scale system theory, hierarchical control structure, controlled atmosphere brazing furnace, aluminum heat exchange components, CAB furnace, LSS theory},
   Year 	= {2000} }


% 93) Record # 389
@article{Sachs95,
   Author	= {Sachs, E. and Hu, A. and Ingolfsson, A.},
   Title 	= {Run by run process control: combining SPC and feedback control},
   Journal	= {Semiconductor Manufacturing, IEEE Transactions on},
   Volume	= {8},
   Number	= {1},
   Pages	= {26-43},
   Abstract	= {The run by run controller provides a framework for controlling a process which is subject to disturbances such as shifts and drifts as a normal part of its operation. The run by run controller combines the advantages of both statistical process control (SPC) and feedback control. It has three components: rapid mode, gradual mode, and generalized SPC. Rapid mode adapts to sudden shifts in the process such as those caused by maintenance operations.  Gradual mode adapts to gradual drifts in the process such as those caused by build-up of deposition inside a reactor. The choice between the two modes is determined by the outcome from generalized SPC which allows SPC to be applied to a process while it is being tuned. The run by run controller has been applied to the control of a silicon epitaxy process in a barrel reactor. Rapid mode recovered the process within 3 runs after a disturbance.  Gradual mode reduced the variation of the process by a factor of 2.7 as compared to historical data.},
   Keywords	= {closed loop systems, statistical process control, integrated circuit manufacture, vapour phase epitaxial growth, semiconductor growth, silicon, run by run process control, SPC, feedback control, statistical process control, rapid mode, gradual mode, maintenance operations, silicon epitaxy process, barrel reactor, IC manufacture, Si},
   Year 	= {1995} }


% 94) Record # 388
@article{,
   Author	= {Pepyne, D.L. and Cassandras, C.G.},
   Title 	= {Optimal control of hybrid systems in manufacturing},
   Journal	= {Proceedings of the IEEE},
   Volume	= {88},
   Number	= {7},
   Pages	= {1108-1123},
   Abstract	= {Hybrid systems combine time-driven and event-driven dynamics. This is a natural framework for manufacturing processes: The physical characteristics of production parts undergo changes at various operations described by time-driven models, while the timing control of operations is described by event-driven models. Accordingly, in the framework we propose, manufactured parts are characterized by physical states (e.g. temperature, geometry) subject to time-driven dynamics and by temporal states (e.g., operation start and stop times) subject to event-driven dynamics. We first provide a tutorial introduction to this hybrid system framework and associated optimal control problems through a single-stage manufacturing process model. We then show how the structure of the problem can be exploited to decompose what is a hard nonsmooth, nonconvex optimization problem into a collection of simpler problems. Next, we present extensions to multistage manufacturing processes for which we develop solution algorithms that make use of Bezier approximation techniques. Emphasis is given to the issue of deriving solutions through efficient algorithms, and some explicit numerical results are included.},
   Keywords	= {industrial control, production control, optimal control, discrete event systems, approximation theory, computational complexity, optimal control, hybrid systems, time-driven dynamics, event-driven dynamics, manufacturing processes, time-driven models, temporal states, nonsmooth nonconvex optimization problem decomposition, multistage manufacturing processes, Bezier approximation techniques, efficient algorithms},
   Year 	= {2000} }


% 95) Record # 387
@inproceedings{,
   Author	= {Morasso, P. and Vercelli, G. and Zaccaria, R.},
   Title 	= {A hybrid framework for robot planning and control},
   BookTitle	= {Neural Networks, 1991., IJCNN-91-Seattle International Joint Conference on},
   Volume	= {2},
   Pages	= {1005},
   Abstract	= {Summary form only given, as follows. The authors discuss the need of integrating symbolic, analogical, and neural methods for robot planning and control. A conceptual framework has been proposed for devising a hybrid computational architecture.<<ETX>>},
   Keywords	= {neural nets, analogical methods, symbolic methods, robot control, hybrid framework, robot planning, neural methods, hybrid computational architecture, neural nets, planning (artificial intelligence), robots},
   Year 	= {1991} }


% 96) Record # 386
@inproceedings{,
   Author	= {Mignone, D. and Bemporad, A. and Morari, M.},
   Title 	= {A framework for control, fault detection, state estimation, and verification of hybrid systems},
   BookTitle	= {American Control Conference, 1999. Proceedings of the 1999},
   Volume	= {1},
   Pages	= {134-138},
   Abstract	= {This paper presents a modeling formalism for hybrid systems which allows one to formulate and solve several practical problems, such as control, formal verification, state estimation, and fault detection. As an extension to previous works we report a technique that allows one to reduce the number of auxiliary binary variables in the modeling phase.},
   Keywords	= {state estimation, fault diagnosis, formal verification, Boolean algebra, formal logic, integer programming, linear programming, quadratic programming, fault detection, state estimation, hybrid systems, formal verification, mixed logical dynamical systems, propositional calculus, Boolean algebra, linear programming, integer programming, quadratic programming},
   Year 	= {1999} }


% 97) Record # 385
@inproceedings{,
   Author	= {Lavrov, A.A.},
   Title 	= {Hybrid multi-agent framework for real-time knowledge-based control},
   BookTitle	= {Intelligent Systems Engineering, 1994., Second International Conference on},
   Pages	= {354-359},
   Abstract	= {The approach proposed is intended to take advantage of simultaneous use of agents of different types that, whilst being essentially independent and running mainly concurrently, produce outputs complementing one another in generating the final control decisions. A simple structure of modules cooperation, oriented mainly on a one-directional flow of module activations, enables a high-speed real-time response; a distributed meta-control provides a dynamic adjustment of each module's impact and simplifies possible modifications of the system.<<ETX>>},
   Keywords	= {hybrid multiagent framework, knowledge-based control, final control decisions, module activations, real-time response, distributed meta-control, dynamic adjustment, modules cooperation, decentralised structure, parallel processing, decentralised control, intelligent control, knowledge based systems, parallel processing, real-time systems},
   Year 	= {1994} }


% 98) Record # 384
@article{,
   Author	= {Koutsoukos, X.D. and Antsaklis, P.J. and Stiver, J.A. and Lemmon, M.D.},
   Title 	= {Supervisory control of hybrid systems},
   Journal	= {Proceedings of the IEEE},
   Volume	= {88},
   Number	= {7},
   Pages	= {1026-1049},
   Abstract	= {In this paper, the supervisory control of hybrid systems is introduced and discussed at length. Such control systems typically arise in the computer control of continuous processes, for example, in manufacturing and chemical processes, in transportation systems, and in communication networks. A functional architecture of hybrid control systems consisting of a continuous plant, a discrete-event controller, and an interface is used to introduce and describe analysis and synthesis concepts and approaches. Our approach highlights the interaction between the continuous and discrete dynamics, which is the cornerstone of any hybrid system study. Discrete abstractions are used to approximate the continuous plant. Properties of the discrete abstractions to be appropriate representations of the continuous plant are presented, and important concepts such as determinism and controllability are discussed. Supervisory control design methodologies are presented to satisfy control specifications described by formal languages. Several examples are used throughout the paper to illustrate our approach.},
   Keywords	= {discrete event systems, computerised control, control system synthesis, control system analysis, controllability, hybrid systems, computer control, continuous processes, manufacturing processes, chemical processes, transportation systems, communication networks, functional architecture, hybrid control systems, continuous plant, discrete-event controller, interface, determinism, controllability, control specifications, supervisory control design methodologies, formal languages},
   Year 	= {2000} }


% 99) Record # 383
@article{Fierro97,
   Author	= {Fierro, R. and Lewis, F.L.},
   Title 	= {A framework for hybrid control design},
   Journal	= {Systems, Man and Cybernetics, Part A, IEEE Transactions on},
   Volume	= {27},
   Number	= {6},
   Pages	= {765-773},
   Abstract	= {This paper presents a hybrid system framework which considers simultaneously the control and decision-making issues. This reconfigurable framework can accommodate a wide range of situations, from aircraft control systems to mobile manipulators. A continuous-state plant is supervised by a discrete-event system which is based on a theory of linked finite state machines. The composite system is viewed as an iterative process where a task is carried out by changing the structure of the continuous-state plant. An algorithm for a hybrid control design is provided and illustrated through a mobile manipulator example.},
   Keywords	= {finite state machines, continuous time systems, discrete event systems, intelligent control, control system synthesis, mobile robots, manipulators, position control, fuzzy logic, closed loop systems, hybrid control design, decision-making, reconfigurable framework, continuous-state plant, discrete-event system, linked finite state machines, composite system, iterative process, mobile manipulator},
   Year 	= {1997} }


% 100) Record # 382
@article{,
   Author	= {Decarlo, R.A. and Branicky, M.S. and Pettersson, S. and Lennartson, B.},
   Title 	= {Perspectives and results on the stability and stabilizability of hybrid systems},
   Journal	= {Proceedings of the IEEE},
   Volume	= {88},
   Number	= {7},
   Pages	= {1069-1082},
   Abstract	= {This paper introduces the concept of a hybrid system and some of the challenges associated with the stability of such systems, including the issues of guaranteeing stability of switched stable systems and finding conditions for the existence of switched controllers for stabilizing switched unstable systems. In this endeavour, this paper surveys the major results in the (Lyapunov) stability of finite-dimensional hybrid systems and then discusses the stronger, more specialized results of switched linear (stable and unstable) systems. A section detailing how some of the results can be formulated as linear matrix inequalities is given. Stability analyses on the regulation of the angle of attack of an aircraft and on the PI control of a vehicle with an automatic transmission are given. Other examples are included to illustrate various results in this paper.},
   Keywords	= {discrete systems, stability, Lyapunov methods, multidimensional systems, matrix algebra, control system analysis, two-term control, stabilizability, hybrid systems, switched stable systems, guaranteed stability, switched unstable systems, Lyapunov stability, finite-dimensional hybrid systems, switched linear systems, linear matrix inequalities, stability analysis, aircraft angle-of-attack regulation, PI control, automatic transmission, vehicle},
   Year 	= {2000} }


% 101) Record # 381
@inproceedings{,
   Author	= {Chacon, E. and Moreno, W. and Dapena, E.},
   Title 	= {A framework to implement hierarchical hybrid control systems in industrial complexes},
   BookTitle	= {Southeastcon '96. 'Bringing Together Education, Science and Technology'., Proceedings of the IEEE},
   Pages	= {195-199},
   Abstract	= {This paper proposes a computer systems architecture (hardware and software) to achieve the implementation of a global control strategy for continuous production complexes. The industrial complex is described by a set of continuous process units, coordinated hierarchically by discrete event dynamic systems (DEDS). The proposal uses a hierarchical structure in three levels. The first level is implemented as a hybrid system. The second and third levels perform the coordination and optimization tasks to define the set points for the set of continuous process units using a discrete event dynamic system approach. This paper shows the computational support (computer hardware, software, and networking) which are necessary to implement the proposed automation scheme.},
   Keywords	= {industrial control, hierarchical systems, discrete event systems, hierarchical hybrid control systems, industrial complexes, computer systems architecture, global control strategy, continuous production complexes, continuous process units, discrete event dynamic systems, DEDS, coordination, optimization},
   Year 	= {1996} }


% 102) Record # 380
@inproceedings{,
   Author	= {Branicky, M.S. and Borkar, V.S. and Mitter, S.K.},
   Title 	= {A unified framework for hybrid control},
   BookTitle	= {Decision and Control, 1994., Proceedings of the 33rd IEEE Conference on},
   Volume	= {4},
   Pages	= {4228-4234},
   Abstract	= {We propose a very general framework for hybrid control problems that encompasses several types of hybrid phenomena considered in the literature. A specific control problem is studied in this framework, leading to an existence result for optimal controls. The "value function" associated with this problem is expected to satisfy a set of "generalized quasi-variational inequalities".<<ETX>>},
   Keywords	= {optimal control, variational techniques, unified framework, hybrid control, optimal control existence result, value function, generalized quasi-variational inequalities},
   Year 	= {1994} }


% 103) Record # 379
@inproceedings{,
   Author	= {Borges de Sousa, J. and Pereira, F.L.},
   Title 	= {A hybrid systems theory framework for the design of a control architecture for multiple autonomous underwater vehicles},
   BookTitle	= {Industrial Electronics, 1997. ISIE '97., Proceedings of the IEEE International Symposium on},
   Volume	= {2},
   Pages	= {747-752},
   Abstract	= {This paper describes the modeling, design and implementation of the generalized vehicle (GV) architecture for the coordinated control of multiple autonomous underwater vehicles in the framework of the hybrid systems theory. A generalized vehicle is a group of vehicles whose spatial and logic organization is controlled in such a way that the group behaves as a single entity. The hybrid systems formalism provides the most adequate framework for incorporating the discrete event and continuous dynamics that arise in the concurrent coordinated operation of multiple vehicles and fully encompasses the modeling, analysis, design and implementation cycle of the GV architecture. A micro-simulation environment of the coordinated operation of multiple AUVs was developed in SHIFT, a new specification language for describing networks of hybrid automata. The DIADEM software environment for implementing on-line, real-time automated management and control systems, is discussed in the context of the implementation of the GV concept.},
   Keywords	= {marine systems, hybrid systems theory framework, control architecture design, multiple autonomous underwater vehicles, coordinated control, logic organization control, spatial organization control, discrete event dynamics, continuous dynamics, concurrent coordinated operation, micro-simulation environment, DIADEM software environment, specification language, SHIFT, hybrid automata, real-time automated management systems, real-time control systems},
   Year 	= {1997} }


% 104) Record # 377
@article{,
   Author	= {Bemporad, A. and Ferrari-Trecate, G. and Morari, M.},
   Title 	= {Observability and controllability of piecewise affine and hybrid systems},
   Journal	= {Automatic Control, IEEE Transactions on},
   Volume	= {45},
   Number	= {10},
   Pages	= {1864-1876},
   Year 	= {2000} }


% 105) Record # 376
@article{,
   Author	= {Antsaklis, P.J.},
   Title 	= {Special issue on hybrid systems: theory and applications a brief introduction to the theory and applications of hybrid systems},
   Journal	= {Proceedings of the IEEE},
   Volume	= {88},
   Number	= {7},
   Pages	= {879-887},
   Year 	= {2000} }


% 106) Record # 375
@inproceedings{,
   Author	= {Liberzon, D.},
   Title 	= {A hybrid control framework for systems with quantization},
   BookTitle	= {Decision and Control, 2001. Proceedings of the 40th IEEE Conference on},
   Volume	= {2},
   Pages	= {1217-1222},
   Abstract	= {This paper is concerned with global asymptotic stabilization of continuous-time systems subject to quantization. A hybrid control strategy originating in earlier work (D. Liberzon, 2000) relies on the possibility of making discrete online adjustments of quantizer parameters. We explore this method for general nonlinear systems with general types of quantizers affecting the state of the system or the control input. The analysis involves merging tools from Lyapunov stability, hybrid systems and input-to-state stability.},
   Keywords	= {asymptotic stability, continuous time systems, online operation, nonlinear control systems, Lyapunov methods, quantisation (signal), hybrid control framework, quantization, global asymptotic stabilization, continuous-time systems, discrete online parameter adjustments, nonlinear systems, general quantizer types, system state, control input, Lyapunov stability, hybrid systems, input-to-state stability},
   Year 	= {2001} }


% 107) Record # 374
@article{Bra+Bor98,
   Author	= {Branicky, M.S. and Borkar, V.S. and Mitter, S.K.},
   Title 	= {A unified framework for hybrid control: model and optimal control theory},
   Journal	= {Automatic Control, IEEE Transactions on},
   Volume	= {43},
   Number	= {1},
   Pages	= {31-45},
   Abstract	= {We propose a very general framework that systematizes the notion of a hybrid system, combining differential equations and automata, governed by a hybrid controller that issues continuous-variable commands and makes logical decisions. We first identify the phenomena that arise in real-world hybrid systems. Then, we introduce a mathematical model of hybrid systems as interacting collections of dynamical systems, evolving on continuous-variable state spaces and subject to continuous controls and discrete transitions. The model captures the identified phenomena, subsumes previous models, yet retains enough structure to pose and solve meaningful control problems. We develop a theory for synthesizing hybrid controllers for hybrid plants in all optimal control framework. In particular, we demonstrate the existence of optimal (relaxed) and near-optimal (precise) controls and derive "generalized quasi-variational inequalities" that the associated value function satisfies. We summarize algorithms for solving these inequalities based on a generalized Bellman equation, impulse control, and linear programming.},
   Keywords	= {hierarchical systems, optimal control, automata theory, dynamic programming, state-space methods, differential equations, continuous time systems, optimal control, differential equations, automata theory, mathematical model, dynamical systems, state spaces, continuous controls, discrete transitions, Bellman equation, impulse control, dynamic programming, hierarchical systems},
   Year 	= {1998} }


% 108) Record # 302
@phdthesis{,
   Author	= {Gonzalez Barreto, David R.},
   Title 	= {Process-Oriented Basis Representations for Multivariate Process Diagnostics and Control (Quality Vectors)},
   School	= {The Pennsylvania State University},
   Type 	= {PHD},
   Abstract	= {Statistical methods for process control do not provide engineering tools for the diagnosis of manufacturing processes. Rather, they characterize and monitor the randomness inherent in the product characteristics to identify periods or production batches which show irregular or atypical behavior on such characteristics. The production engineer must then diagnose the cause or causes of such behaviors and to define the appropriate correction action. This research proposes a new diagnostic approach for multivariate process data using a process-oriented basis. Many potential production problems have characteristic signatures that can be detected in the multivariate quality vector. Each pattern (signature) is associated with a basis element in the process-oriented basis. The multivariate quality vector can be represented as a linear combination of these basis elements. Basis elements with large coefficients suggest particular causes for process problems. The methodology is applied to solder paste deposition for surface mount integrated circuits, where a vision system captures the solder paste volume deposited on each pad for critical components. The multivariate vector in this process has 208 components. Using simple patterns, the diagnostic capabilities of the methodology were illustrated. The implementation was initiated with the generation of process-oriented basis (POB's) for the stencil printer, with their associated process causes. The construction of these POB's provides an efficient way of capturing and maintaining process knowledge. A control procedure appropriate for the coefficient of each basis element was developed. In this case these coefficients detected drift and bias in certain elements. In contrast to the traditional search for causes, a direct link exists between a signal in a chart for a coefficient and a reduced set of potential causes. Also, performing the residual vector analysis a new basis element which was confirmed in the process was uncovered.},
   Keywords	= {Advisor: Barton, Russell, engineering, industrial (0546), engineering, electronics and electrical (0544)},
   Year 	= {1996} }


% 109) Record # 301
@phdthesis{Worh97,
   Author	= {Worhach, Paul},
   Title 	= {Integration of environmental factors in manufacturing modeling for product planning and design, with applications to printed circuit board assembly},
   School	= {University of California},
   Type 	= {Ph.D},
   Abstract	= {This dissertation develops a planning methodology for integrating manufacturing-related environmental factors into product, process and facility design and operational decisions, with applications to printed circuit board assembly. Central to this methodology is the definition of manufacturing models for unit-level and batch processes that relate process parameters and component design features to waste streams, energy consumption, yield, and process time. Models for surface mount (stencil application and reflow soldering), through-hole component assembly (wave soldering), and board cleaning are developed and validated with data from several production lines. The process models are then used in production models of facility operations that include data from a range of product types and processes modeling manufacturing activities at the plant level. Metrics for evaluating hazard potential and costs associated with environmental impact are developed to guide planning and design decisions. Detailed case studies are presented for a single printed circuit board and for several boards produced over a planning horizon of one week in a single facility. Specific operational issues can be addressed through optimization formulations with relevant environmental objectives. For printed circuit board assembly, a model is formulated for the assignment of boards to production lines and workers to production lines to minimize overall waste generation and to minimize the maximum potential workplace hazard at any line due to these wastes. This work also contributes to the fields of life-cycle analysis (LCA) and design-for-environment (DfE) by developing an analysis methodology based on process models, rather than on aggregate industry or plant level data. When the process models are used in conjunction with the production models, the effects of the timing and location of wastes, which are typically not accounted for in LCA, can be included in the analysis. The LCA and DfE literature is comprehensively reviewed to provide the context for this contribution. The key contributions of this dissertation are: (1) The collection of detailed process waste data (solder paste, solvents, water, solder dross, and volatile organic compounds) and energy utilization data (thermal and mechanical) for printed circuit board assembly from several industrial sites for VOC clean, aqueous clean, and no-clean processes. (2) The development of process models for solder paste stenciling, reflow soldering, VOC and aqueous clean, and wave soldering. The models express waste and energy flows on a per-unit and per-batch basis. Parameters from the models are estimated from the process data, and the models are validated with aggregate waste and energy flow data. (3) The specification of mappings from the domain of the process data and the process models to decisions at the product and process levels of design. (4) The formulation of production optimization models for the operational management of hazard profiles and total solder paste waste generation in a production facility for printed circuit board assembly. The models plan production schedules and worker assignments; an integrated production-worker assignment problem is formulated as well. (5) The implementation of a World Wide Web interface for the process and production optimization models.},
   Keywords	= {Advisor: Sheng, Paul S., engineering, industrial (0546), environmental sciences (0768), engineering, environmental (0775)},
   Year 	= {1997} }


% 110) Record # 300
@phdthesis{,
   Author	= {Herman, Carl Robert},
   Title 	= {Methods of Process Control and Quality Assurance in Surface Mount Technology},
   School	= {State University of New York at Binghamton},
   Type 	= {Ph.D.},
   Abstract	= {This dissertation is aimed at the analysis of factors responsible for the reliability of surface mount electronics. High reliability of these devices can be assured by effective process control at the stage of manufacturing and by monitoring environmental conditions and on-line diagnostics at the stage of operation. A technique for on-line monitoring of surface mount assembly, including computer based analysis and adaptive control, is developed. Today, a fundamental lack of information prevents the full scale implementation of conventional statistical process control techniques in surface mount manufacturing. Data representing the condition of solder paste through all stages of the process is not acquired. This study includes a thorough investigation of the interrelationship between surface mount process variables and develops a data collection technique and a corresponding prototype device that can be utilized for on-line monitoring of solder paste. Novel techniques for mathematical modelling, model based process analysis, prediction and control which take advantage of the on-line process data are also developed. At the stage of operation, thermal cycling is among the critical factors causing failures in surface mount products. Techniques are developed for real-time characterization of transient heat transfer in surface mount modules utilizing thermal transfer functions. This approach provides the basis for accurate temperature prediction at inaccessible locations in structural and dynamic-air-flow cavities. Adaptive control techniques are applied for on-line parameter estimation which allow for transfer function adaptation in dynamic thermal environments and the generation of a thermal time history, applicable to diagnostic failure prediction.},
   Keywords	= {engineering, electronics and electrical (0544)},
   Year 	= {1993} }


% 111) Record # 299
@phdthesis{,
   Author	= {Hailey, Paul Francis},
   Title 	= {An Evaluation and Implementation of No-Clean Solder Paste for Use in Printed Circuit Board Assembly},
   School	= {University of Lowell},
   Type 	= {MS},
   Year 	= {1995} }


% 112) Record # 298
@phdthesis{Li96,
   Author	= {Li, Yuan},
   Title 	= {Yield Improvement, Reliability Modeling and Design Optimization for Solder Interconnection (Joints)},
   School	= {University of Colorado at Boulder},
   Note 	= {Advisor: Mahajan, Roop L.},
   Type 	= {Ph.D.},
   Abstract	= {This research studies the effect of the surface mount assembly process and solder joint design on the quality and reliability of solder joints using a judicious combination of design of experiment, neural network and stress/strain finite element analysis techniques. A statistical-neural network modeling approach is applied to optimize stencil printing process. The objective is to determine the settings of the machinery parameters that result in minimum solder paste height variation. First, a Taguchi array, L27, is designed to conduct the experiment. Then, neural network models are developed to relate the desired quality characteristics to the parameters. A modular approach is used to select the appropriate architecture for these models. These models, in conjunction with the gradient descent algorithm, are used to determine the optimum settings. Confirming experiments on the production line validate the optimum settings predicted by the model. The effect of stencil printing optimization on the reliability of the ceramic and plastic ball grid arrays (BGA) is also investigated. The procedures to calculate the solder fillet shape for ceramic BGAs using mathematical functions, and to predict the solder joint shape for plastic BGAs using finite element solutions are described. Stress/strain finite element analysis and the Coffin-Manson relationship are applied to calculate the mean fatigue lives of the solder joints. The results reveal that an optimized stencil printing process significantly reduces variation in the life of ceramic BGAs, and the maximum strain region shifts from the card-side eutectic solder to the module side as the card-side solder volume increases. This shift in maximum strain suggests that there exists an optimum ratio between the card-side and the module-side solder volume for the reliability of a given ceramic BGA. The implications of this for the package developers and users are discussed. On the other hand, the calculations indicate that the life of plastic BGAs is practically insensitive to the card-side solder volume. In addition to stencil printing process, the solder joint design has a significant effect on its reliability. A ceramic BGA is selected as the demonstration vehicle. A central composite design is employed to investigate the effect of the design parameters such as solder volume, pad size and solder ball size on the reliability. A response surface is built and used to find the optimum design values. The results reveal that, all three parameters are significant. In particular, it is found that the optimum value of the card-side solder volume is close to the module-side solder volume, the fatigue life does not vary monotonically with the solder ball size--the interplay of stress concentration and the compliancy of a solder joint decides its effect on the reliability, and beyond some value of the card pad size, its effect on fatigue life is marginal. (Abstract shortened by UMI.)},
   Year 	= {1996} }


% 113) Record # 297
@phdthesis{,
   Author	= {Perez Soto, Heriberto},
   Title 	= {Study of the thermal behavior of a printed circuit board during the reflow process inside a surface mount technology oven},
   School	= {University of Pueto Rico},
   Type 	= {MSC},
   Abstract	= {This thesis presents the development of a numerical model to predict the thermal behavior during the surface mount technology reflow process. The reflow process is a heating process in which the solder paste is melted and then solidified on printed circuit boards (PCBs). Various assumptions were used during the development of the model to simplify the different heat transfer modes present in the problem, including negligible temperature gradient in the vertical direction. The final numerical model was able to predict the temperature profile for an ideal PCB. The ideal PCB consisted of a solid copper plate 0.3048 m by 0.2413 m with a 0.0635 m thickness, dimensions similar to many actual motherboards. Experiments were designed and executed with the objective of gathering data for model calibration. Temperature distributions inside an actual reflow oven were collected simultaneously with temperature measurements along a test board. The reflow oven consisted of twenty heating panels symmetrically distributed below and above the PCB conveyor, as used in actual manufacturing applications. Two oven temperature conditions were considered, namely, ideal and actual set-points, and two conveyor speeds, 1.27 cm/s and 1.905 cm/s. Ideal set-points consisted of uniform temperatures throughout the panels. Comparisons between the numerical and experimental solutions show that the proposed model predicts transient, multi-dimensional heat transfer trends in reflow processes reasonably well. Results indicate that ideal set-point conditions are better predicted by the model, with an average temperature difference of 5.10°C. Actual set-point conditions are approximated by the model within an average temperature difference of 9.51°C. Major differences between the model and the experimental data were found in the cooling section of the oven. (Abstract shortened by UMI.)},
   Keywords	= {Advisor: Serrano, David, engineering, mechanical (0548), engineering, electronics and electrical (0544)},
   Year 	= {1998} }


% 114) Record # 296
@phdthesis{,
   Author	= {Berrios, Antonio Tavarez},
   Title 	= {Modeling the reflow process of an actual PCB},
   School	= {UNIVERSITY OF PUERTO RICO},
   Type 	= {MSME},
   Abstract	= {This thesis describes the development of a model of the reflow process of actual solder pastes as used in Surface Mount Technology (SMT) lines. Solder paste is a mixture consisting of three functional components: solder powder, flux, and solvent. The model considers the coupled heat transfer process between the solder and the flux including changes in solder paste properties. Specifically, the model considers the loss of solvents in the vehicle system of the flux, melting, solidification and further single phase cooling. The model clearly shows the effect that the oven temperatures and conveyor speeds may have in accelerating/decelerating the loss of weight, melting and solidification processes. Experiments were conducted with the objective of validating the temperature profiles and the loss of weight due to flux solvent evaporation predictions. Results are shown for typical eutectic paste 63%Sn-37%Pb and experimental data is in good agreement with the numerical model. The model predicts the thermal behavior of any eutectic solder paste system, and as an example a simulation using the lead-free solder paste system 96.5%Sn-3.5%Ag is reported. Finally, the model is capable of predicting the temperature profiles of, the multi-layer printed circuit boards (PCB's), the solder pads, and components of a SMT assembly during the reflow process with reasonable accuracy.},
   Keywords	= {Advisor: Gonzalez, Jorge E., engineering, mechanical (0548)},
   Year 	= {2001} }


% 115) Record # 295
@phdthesis{Pan02,
   Author	= {Pan, Jianbiao},
   Title 	= {Modeling and process optimization of solder paste stencil printing for micro-BGA and fine pitch surface mount assembly},
   School	= {Lehigh University},
   Type 	= {Ph.D.},
   Abstract	= {The need for higher pin count, higher performance, smaller size and lighter weight has driven the development of advanced packages such as Quad Flat Package (QFP), Ball Grid Array (BGA), Chip Scale Package (CSP), and Flip Chip. These high-density electronic packages have had a tremendous impact on board-level assembly. One of the main challenges continues to be the solder paste deposition process and, specifically, controlling the amount of solder paste deposited. Stencil printing is one of the most cost-effective processes for solder paste deposition and it has been widely used in traditional surface mount assembly. However, the solder paste stencil printing process is still not completely understood as indicated by the fact that industry reports 52-71% of fine pitch and ultra-fine pitch SMT defects are related to the solder paste stencil printing process. The objective of this research was to understand and optimize the solder paste stencil printing process. An analytical model was developed using fluid mechanics theory. The paste flow pattern in front of the squeegee was studied and the volume of paste through the aperture was calculated. The relationship between transfer ratio and area ratio was derived. This model explains two experimental phenomena. One is that increasing stencil thickness does not necessarily lead to thicker deposits. The other is that perpendicular apertures print thicker than parallel apertures. An experiment was designed and conducted to validate the model and to investigate the effects of relevant process parameters on the amount of solder paste deposited. The factors selected in the experiment are aperture size, aperture shape, board finish, stencil thickness, solder type, and print speed. The deposited solder paste was measured by an automatic laser-based 3-D triangulation solder paste inspection system. The gauge repeatability & reproducibility (R&R) of the inspection system was evaluated. The experimental data were analyzed by Analysis of Variance (ANOVA). The critical variables were identified and interactions between process variables were determined. The experimental results are shown to be consistent with the theoretical model. This study will help to accelerate the development and utilization of BGA, CSP and flip chip packages.},
   Keywords	= {ISBN: 0-599-89285-4, ADVISER: Tonkay, Gregory L.},
   Year 	= {2000} }


% 116) Record # 294
@book{Hagglund91,
   Author	= {Tore, Hägglund},
   Title 	= {Process control in practice},
   Publisher	= {Lund : Studentlitteratur ; [Bromley, Kent], Chartwell-Bratt},
   Keywords	= {Industries, Automatic control systems},
   Year 	= {1991} }


% 117) Record # 293
@book{Bertsekas95,
   Author	= {Bertsekas, Dimitri P.},
   Title 	= {Dynamic programming and optimal control},
   Publisher	= {Athena Scientific},
   Keywords	= {Dynamic programming, Control theory},
   Year 	= {1995} }


% 118) Record # 291
@article{,
   Author	= {Lin, Jong-Kai and Fang, Treliant and Bajaj, R.},
   Title 	= {Squeegee bump technology},
   Journal	= {Components and Packaging Technologies, IEEE Transactions on [see also Components, Packaging and Manufacturing Technology, Part A: Packaging Technologies, IEEE Transactions on]},
   Volume	= {25},
   Number	= {1},
   Pages	= {38-44},
   Abstract	= {An innovative solder bumping technology, termed squeegee bumping, has been developed at Motorola's Interconnect Systems Laboratory that uses baked photoresist as a mask for solder printing to deposit fine pitch solder bumps on wafers. This process provides much better alignment accuracy and is capable of bumping finer pitch devices than stencil printing technology. Solder paste printing uses a screen printer similar to that used for stencil printing. Greater versatility of solder materials can be obtained through solder paste than the electroplating. Cost modeling shows that the squeegee bump technology has a significant cost benefit over controlled collapse chip connection (C4) technology. This is because the C4 process has very low efficiency in labor and materials usage. Statistical process control data show an average bump height of 118 /spl plusmn/ 3.5 /spl mu/m, and a maximum-to-minimum bump height range of 17 /spl mu/m over a 150 mm-diameter wafer and have been produced repeatedly on test wafers with 210 /spl mu/m peripheral pitch. A 109.6 /spl plusmn/ 1.3 /spl mu/m bump height on orthogonal array with 250 /spl mu/m pitch has been successfully demonstrated with greater than 90% die yield. Bump reliability has been studied using both multiple reflows and extended thermal/humidity storage procedures. No degradation of shear strength was observed after up to 10 /spl times/ reflows and 1008 h of a thermal/humidity stress environment. Bump reliability was also evaluated by assembling squeegee bumped dice on a plastic chip scale package (CSP). Liquid-to-liquid thermal shock cycling at a temperature range of -55/spl deg/C to +125/spl deg/C had a characteristic life of 2764 cycles with a 1st failure at 1050 cycles. No failures were observed after 432 h of autoclave stress at 121/spl deg/C, 100% RH, 15 psig test condition.},
   Keywords	= {reflow soldering, statistical process control, flip-chip devices, fine-pitch technology, plastic packaging, chip scale packaging, shear strength, reliability, squeegee bump technology, baked photoresist mask, fine pitch solder bumping, screen printing, solder paste printing, statistical process control, orthogonal array, thermal/humidity storage, reliability, multiple reflows, shear strength, plastic chip scale package, die yield, flip-chip interconnect, stencil printing, liquid-to-liquid thermal shock cycling, autoclave stress, -55 to 125 C},
   Year 	= {2002} }


% 119) Record # 290
@article{,
   Author	= {Grilletto, C. and Arroyave, C.A. and Govind, A. and Salvaleon, E.R.},
   Title 	= {Growth prediction of tin/copper intermetallics formed between 63/37 Sn/Pb and OSP coated copper solder pads for a flip chip application},
   Journal	= {Electronics Packaging Manufacturing, IEEE Transactions on [see also Components, Packaging and Manufacturing Technology, Part C: Manufacturing, IEEE Transactons on]},
   Volume	= {25},
   Number	= {2},
   Pages	= {78-83},
   Abstract	= {This study quantifies the effect of temperature and time on the growth of Cu-Sn intermetallics, specifically for flip chip/ball grid array packaging technology. The activation energy and the growth rates were determined for solid state diffusion, after the initial assembly reflow(s). Three different types of solder joints were investigated. 1) BGA 63/37 solder joints which were formed by a standard convection oven attach of 30 mil (760 /spl mu/m)diameter solder spheres to OSP protected, Cu plated ball pads of an organic flip chip substrate. The ball pads are solder mask defined and of 0.635 mm nominal diameter. 2) Flip chip bump pad solder joint consisting of 63/37 eutectic solder bumped die attached to a nonsolder mask defined, OSP protected, Cu plated pad of the flip chip substrate. The flip chip bumps on the die are created by screen printing solder paste on the die pads and subsequent reflow attach, by a standard convection oven to the die under bump metallurgy (UBM). The nominal die UBM pad diameter is 0.085 mm. 3) Solder joint formed on a coupon which involved the reflow of the balls randomly placed on a Cu plated layer with no solder mask coating. The investigation was performed by first establishing the intermetallic growth rate at six different temperatures, ranging from 85/spl deg/C to 150/spl deg/C. The relationship between intermetallic growth and time was shown to essentially follow the common parabolic diffusion relationship to temperature especially above 100/spl deg/C. The activation energy (E/sub a/) and the growth constant (k/sub 0/) were then calculated from this data. The results showed that the E. for the total intermetallic thickness was essentially similar for the three solder joint configurations of the ball, bump and the coupon described above. E. varied from 0.31 eV to 0.32 eV, while the k/sub 0/ varied from 18.0 /spl mu/m/s/sup 1/2 / to 24.2 /spl mu/m/s/sup 1/2 /.},
   Keywords	= {flip-chip devices, ball grid arrays, reflow soldering, chemical interdiffusion, temperature effect, time dependence, intermetallics growth, flip chip, activation energy, growth rates, solid state diffusion, initial assembly reflow, BGA solder joints, OSP coated copper solder pads, bump pad solder joint, eutectic solder, screen printing, reflow attach, thermal cycles, plastic BGA, empirical model, intermetallic thickness, Arrhenius plot, 85 to 150 C, SnPb-Cu, CuSn},
   Year 	= {2002} }


% 120) Record # 289
@article{Robbins+Monro51,
   Author	= {Robbins, H. and Monro, S.},
   Title 	= {A stochastic approximation method},
   Journal	= {Annals of Mathematical Statistics},
   Volume	= {22},
   Pages	= {400-407},
   Year 	= {1951} }


% 121) Record # 288
@inproceedings{Maeda91,
   Author	= {Maeda, Y. and Kanata, Y.},
   Title 	= {An algorithm for a least-square approximation problem of unknown systems},
   BookTitle	= {Industrial Electronics, Control and Instrumentation, 1991. Proceedings. IECON '91., 1991 International Conference on},
   Address	= {Dept. of Electr. Eng., Kansai Univ., Osaka, Japan},
   Volume	= {3},
   Pages	= {1881-1886},
   Abstract	= {The authors consider a problem of finding a least-squares approximation parameter that minimizes the output error of unknown systems. When the dimension of the output is equal to the dimension of the input, one can apply the stochastic approximation algorithm. On the other hand, if the dimension of the output is greater than the dimension of the input, one cannot use stochastic approximation. The authors propose an algorithm that is applicable to this problem. This algorithm is an extension of the Robbins-Monro stochastic approximation procedure. A convergence theorem for this proposed procedure is demonstrated.},
   Keywords	= {unknown systems, least-squares approximation, output error, Robbins-Monro stochastic approximation, convergence theorem, convergence of numerical methods, least squares approximations},
   Year 	= {1991} }


% 122) Record # 287
@inproceedings{Kulkarni93,
   Author	= {Kulkarni, S.R. and Horn, C.},
   Title 	= {Convergence of the Robbins-Monro algorithm under arbitrary disturbances},
   BookTitle	= {Decision and Control, 1993., Proceedings of the 32nd IEEE Conference on},
   Address	= {Dept. of Electr. Eng., Princeton Univ., NJ, USA},
   Volume	= {1},
   Pages	= {537-538},
   Abstract	= {The Robbins-Monro algorithm under arbitrary deterministic disturbances is studied and necessary and sufficient conditions on the noise sequence are obtained for convergence of the algorithm. We introduce a notion of persistently disturbing noise sequences, and show that it characterises convergence of the algorithm under each fixed noise sequence. The results obtained are stronger than previous conditions and the proof techniques are simpler, involving only basic notions of convergence.},
   Keywords	= {convergence of numerical methods, identification, noise, function approximation, stochastic approximation, Robbins-Monro algorithm, arbitrary deterministic disturbances, sufficient conditions, necessary conditions, noise sequence, convergence},
   Year 	= {1993} }


% 123) Record # 286
@article{Wei01,
   Author	= {Wei, Yongbin and Gelfand, S.B. and Krogmeier, J.V.},
   Title 	= {Noise-constrained least mean squares algorithm},
   Journal	= {Signal Processing, IEEE Transactions on},
   Volume	= {49},
   Number	= {9},
   Pages	= {1961-1970},
   Abstract	= {We consider the design of an adaptive algorithm for finite impulse response channel estimation, which incorporates partial knowledge of the channel, specifically, the additive noise variance. Although the noise variance is not required for the offline Wiener solution, there are potential benefits (and limitations) for the learning behavior of an adaptive solution. In our approach, a Robbins-Monro algorithm is used to minimize the conventional mean square error criterion subject to a noise variance constraint and a penalty term necessary to guarantee uniqueness of the combined weight/multiplier solution. The resulting noise-constrained LMS (NCLMS) algorithm is a type of variable step-size LMS algorithm where the step-size rule arises naturally from the constraints. A convergence and performance analysis is carried out, and extensive simulations are conducted that compare NCLMS with several adaptive algorithms. This work also provides an appropriate framework for the derivation and analysis of other adaptive algorithms that incorporate partial knowledge of the channel.},
   Keywords	= {least mean squares methods, adaptive signal processing, transient response, convergence of numerical methods, random processes, time-varying channels, AWGN, noise-constrained least mean squares algorithm, adaptive algorithm design, finite impulse response channel estimation, FIR channel estimation, additive noise variance, offline Wiener solution, learning behavior, Robbins-Monro algorithm, mean square error criterion minimisation, noise variance constraint, penalty term, weight/multiplier solution, NCLMS algorithm, variable step-size LMS algorithm, convergence analysis, performance analysis, simulations, partial channel knowledge, convergence rate, time-varying channel, random walk, FIR channel estimation/system identification, AWGN},
   Year 	= {2001} }


% 124) Record # 285
@book{Lambert91,
   Author	= {Lambert, J. D.},
   Title 	= {Numerical methods for ordinary differential systems : the initial value problem},
   Publisher	= {Wiley},
   Keywords	= {Initial value problems Numerical solutions},
   Year 	= {1991} }


% 125) Record # 284
@book{Csorgo93,
   Author	= {Csörgö, M. and Horváth, Lajos},
   Title 	= {Weighted approximations in probability and statistics},
   Publisher	= {John Wiley & Sons},
   Keywords	= {Stochastic approximation.},
   Year 	= {1993} }


% 126) Record # 283
@book{Benveniste90,
   Author	= {Benveniste, Albert and Métivier, Michel and Priouret, P.},
   Title 	= {Adaptive algorithms and stochastic approximations},
   Publisher	= {Springer-Verlag},
   Keywords	= {Stochastic approximation., Sequential analysis., Algorithms.},
   Year 	= {1990} }


% 127) Record # 282
@book{Ibragimov78,
   Author	= {Ibragimov, I. A. and Rozanov, I. U. A.},
   Title 	= {Gaussian random processes},
   Publisher	= {Springer-Verlag},
   Keywords	= {Stochastic processes.},
   Year 	= {1978} }


% 128) Record # 281
@book{Kushner97,
   Author	= {Kushner, Harold J. and Yin, George},
   Title 	= {Stochastic approximation algorithms and applications},
   Publisher	= {Springer},
   Keywords	= {Stochastic approximation.},
   Year 	= {1997} }


% 129) Record # 280
@book{,
   Author	= {Mahon, J. and Trinity College (Dublin Ireland). School of Engineering},
   Title 	= {Three-dimensional inspection of solder paste on surface mount printed circuit boards},
   Publisher	= {Trinity College Department of Computer Science},
   Address	= {Dublin},
   Keywords	= {Engineering inspection Automation, Computer-aided design, Printed circuits, Testing},
   Year 	= {1991} }


% 130) Record # 279
@book{Lotfi+Howarth98,
   Author	= {Lotfi, Ahmad and Howarth, Martin},
   Title 	= {An intelligent closed-loop control of solder paste stencil printing stage of surface mount technology},
   Publisher	= {Nottingham Trent University. Department of Mechanical and Manufacturing Engineering},
   Address	= {Nottingham},
   Keywords	= {Surface mount technology, Solder pastes, Printed circuits},
   Year 	= {1998} }


% 131) Record # 278
@book{,
   Author	= {Taguchi, Genichi},
   Title 	= {System of experimental design : engineering methods to optimize quality and minimize costs},
   Publisher	= {UNIPUB/Kraus International Publications; American Supplier Institute},
   Address	= {White Plains, N.Y.; Dearborn, Mich.},
   Volume	= {2},
   Keywords	= {Experimental design},
   Year 	= {1987} }


% 132) Record # 277
@book{,
   Author	= {Taguchi, Gen'ichi and Konishi, Shozo and American Supplier Institute},
   Title 	= {Orthogonal arrays and linear graphs : tools for quality engineering},
   Publisher	= {American Supplier Institute},
   Address	= {Dearborn, Mich.},
   Keywords	= {Quality control Tables, Engineering design Tables, Engineering design, Kvalitetskontroll (Tabeller), Quality control (Tables)},
   Year 	= {1987} }


% 133) Record # 276
@book{,
   Author	= {Taguchi, Genichi and Asian Productivity Organization},
   Title 	= {Introduction to quality engineering : designing quality into products and processes},
   Publisher	= {The Organization},
   Address	= {Tokyo},
   Keywords	= {Quality control, Engineering design, off-line quality control},
   Year 	= {1986} }


% 134) Record # 275
@book{,
   Author	= {Taguchi, Gen'ichi and Yokoyama, Yoshiko},
   Title 	= {Taguchi methods},
   Keywords	= {Taguchi methods (Quality control)},
   Year 	= {1994} }


% 135) Record # 274
@book{,
   Author	= {Taguchi, Genichi},
   Title 	= {Taguchi on robust technology development : bringing quality engineering upstream},
   Publisher	= {ASME},
   Address	= {New York},
   Series	= {ASME press series on international advances in design productivity,},
   Keywords	= {Kvalitetskontroll (Produktionsadministration), Quality control (Production management)},
   Year 	= {1993} }


% 136) Record # 273
@book{,
   Author	= {Taguchi, Genichi and Yokoyama, Yoshiko},
   Title 	= {Taguchi methods : design of experiments},
   Publisher	= {ASI Press},
   Address	= {Dearborn, Mich.},
   Series	= {Quality engineering series, 4},
   Keywords	= {Quality control Statistical methods, Experimental design, Taguchi methods (Quality control), Kvalitetskontroll},
   Year 	= {1993} }


% 137) Record # 272
@misc{,
   Author	= {Galbraith, Lori Ann},
   Title 	= {Genichi Taguchi's theory of experimental design examples and critique},
   Publisher	= {National Library of Canada},
   ISBN	= {0315500514},
   Year 	= {1989} }


% 138) Record # 271
@book{,
   Author	= {Lee, D. C.},
   Title 	= {Taguchi's method of product design optimization},
   Publisher	= {Institute for Computer Research University of Waterloo},
   Address	= {Waterloo, Ont.},
   Year 	= {1985} }


% 139) Record # 270
@book{,
   Author	= {Naeemy, Ali},
   Title 	= {A study of the Taguchi's method in off-line quality control},
   Publisher	= {National Library of Canada = Bibliothèque nationale du Canada},
   Address	= {Ottawa},
   Year 	= {1991} }


% 140) Record # 269
@book{,
   Author	= {Roy, Ranjit},
   Title 	= {A primer on the Taguchi method},
   Publisher	= {Van Nostrand Reinhold},
   Address	= {New York},
   Series	= {Competitive manufacturing series},
   Keywords	= {Taguchi, Gen*ichi, 1924-, Taguchi methods (Quality control)},
   Year 	= {1990} }


% 141) Record # 268
@book{,
   Author	= {Taylor, Wayne A. and American Society for Quality Control.},
   Title 	= {Optimization and variation reduction in quality},
   Publisher	= {McGraw-Hill},
   Address	= {New York},
   Series	= {Wayne A. Taylor ; sponsored by the American Society for Quality Control.},
   Keywords	= {Quality control Statistical methods, Taguchi methods (Quality control), Process control Statistical methods},
   Year 	= {1991} }


% 142) Record # 267
@book{,
   Author	= {Logothetis, N.},
   Title 	= {Managing for total quality : from Deming to Taguchi and SPC},
   Publisher	= {Prentice Hall International},
   Address	= {Hemel Hempstead, England},
   Series	= {Manufacturing practitioner series},
   Keywords	= {Total quality management, Manufactures Management},
   Year 	= {1992} }


% 143) Record # 266
@book{,
   Author	= {Kamen, Edward Walter and Georgia Institute of Technology. School of Electrical and Computer Engineering. Project no. E-21-H28.},
   Title 	= {SME filter approach to multiple target tracking and sensor fusion},
   Publisher	= {School of Electrical and Computer Engineering Georgia Institute of Technology},
   Series	= {Issued as Semi-annual progress reports [nos. 1-5], and Final technical report, Project E-21-H28.},
   Keywords	= {Electric filters., Radar targets., Multisensor data fusion.},
   Year 	= {1992} }


% 144) Record # 265
@book{,
   Author	= {Kamen, Edward Walter and Georgia Institute of Technology. School of Electrical and Computer Engineering. Project no. E-21-W92.},
   Title 	= {APT process control and information network architecture : Phase I - scoping analysis},
   Publisher	= {School of Electrical and Computer Engineering Georgia Institute of Technology},
   Series	= {Issued as Final report, Project E-21-W92.},
   Keywords	= {Nuclear reactors Computer programs., Computer network architectures.},
   Year 	= {1996} }


% 145) Record # 264
@phdthesis{,
   Author	= {Lee, Yong Joo},
   Title 	= {The SME filter approach to multiple target tracking with false and missing measurements},
   School	= {Georgia Institute of Technology 1994.},
   Keywords	= {Electric filters., Radar targets., Estimation theory., Electric engineering Theses 1994.},
   Year 	= {1993} }


% 146) Record # 263
@phdthesis{,
   Author	= {Mauroy, Gilles Patrick},
   Title 	= {Multiple target tracking using neural networks and set estimation},
   School	= {Georgia Institute of Technology},
   Keywords	= {Tracking radar., Neural networks (Computer science), Automatic tracking., Electrical and computing engineering Theses 1998., Electric engineering Theses 1998.},
   Year 	= {1997} }


% 147) Record # 262
@book{,
   Author	= {Kamen, Edward Walter and Georgia Institute of Technology. School of Electrical Engineering. Project E-21-631.},
   Title 	= {New algebraic methods in the analysis and synthesis of complex systems},
   Publisher	= {School of Electrical Engineering Georgia Institute of Technology},
   Series	= {Issued as Progress report [1-4], and Final report, Project E-21-631.},
   Keywords	= {System analysis.},
   Year 	= {1974} }


% 148) Record # 261
@book{,
   Author	= {Kamen, Edward Walter and Georgia Institute of Technology. School of Electrical Engineering. Project E-21-670.},
   Title 	= {An algebraic theory of time-varying heredity systems with applications to control},
   Publisher	= {School of Electrical Engineering Georgia Institute of Technology},
   Series	= {Issued as Report, Project E-21-670.},
   Keywords	= {Control theory., Functional differential equations.},
   Year 	= {1977} }


% 149) Record # 260
@book{,
   Author	= {Kamen, Edward Walter and Georgia Institute of Technology. School of Electrical Engineering. Project no. E-21-620. and Georgia Institute of Technology. School of Electrical Engineering. Project no. G-37-628.},
   Title 	= {Linear time - invariant & time-varying systems defined over commutative algebras},
   Publisher	= {School of Electrical Engineering Georgia Institute of Technology},
   Series	= {Issued as Progress reports no. [1-2], and Final report, Project E-21-620 (subproject is G-37-628).},
   Keywords	= {System analysis.},
   Year 	= {1981} }


% 150) Record # 259
@book{,
   Author	= {Kamen, Edward W. and Heck, Bonnie S.},
   Title 	= {Fundamentals of signals and systems using MATLAB},
   Publisher	= {Prentice Hall},
   Keywords	= {Signal processing Digital techniques., System analysis.},
   Year 	= {1997} }


% 151) Record # 258
@book{,
   Author	= {Kamen, Edward Walter and Georgia Institute of Technology. School of Electrical Engineering. Project E-21-615.},
   Title 	= {Research initiation : linear time varying system},
   Publisher	= {School of Electrical Engineering Georgia Institute of Technology},
   Series	= {Issued as [Paper no. 1-3] and Final report, Project E-21-615.},
   Keywords	= {System analysis.},
   Year 	= {1973} }


% 152) Record # 257
@book{,
   Author	= {Kamen, Edward Walter and Georgia Institute of Technology. School of Electrical Engineering. Project E-21-606.},
   Title 	= {Algebraic methods applied to systems containing pure or distributed time delays},
   Publisher	= {School of Electrical Engineering Georgia Institute of Technology},
   Series	= {Issued as Progress report [1-2], and Final report, Project E-21-606.
Final report has title: Theory of complex linear systems.},
   Keywords	= {Linear programming., Delay lines., Rings (Algebra)},
   Year 	= {1977} }


% 153) Record # 256
@book{,
   Author	= {Kamen, Edward Walter and Bush, Aubrey Marvin and Georgia Institute of Technology. School of Electrical Engineering. Project E-21-601.},
   Title 	= {Nonlinear systems and multidimensional digital signal processing},
   Publisher	= {School of Electrical Engineering Georgia Institute of Technology},
   Series	= {Issued as Progress report [1-2], and Final report, Project E-21-601.},
   Keywords	= {Signal processing., Nonlinear theories.},
   Year 	= {1976} }


% 154) Record # 255
@inproceedings{,
   Author	= {Shiu, S.C.K. and Tsang, E.C.C. and Yeung, D.S. and Lam, M.B.},
   Title 	= {Evaluation of printed circuit board assembly manufacturing systems using fuzzy colored Petri nets},
   BookTitle	= {Systems, Man, and Cybernetics, 1998. 1998 IEEE International Conference on},
   Address	= {Dept. of Comput., Hong Kong Polytech. Univ., Hong Kong},
   Volume	= {2},
   Pages	= {1506-1511},
   Abstract	= {In this paper, implementation and evaluation of a printed circuit board assembly (PCBA) manufacturing system model based on fuzzy colored Petri nets (FCPN) modeling was performed. From the Petri nets simulation results, two contributions were claimed: (1) The successful application of our approach to evaluate systems that consist of complicated concurrent processes with embedded data structures and uncertainty reasoning. (2) An approach in automatic determination of the threshold values in the fuzzy production rules using FCPN. The details of the assembling processes and various manufacturing data were gathered from computer manufacturers located in China. Different resource allocation strategies were introduced in the experiments, and simulation results were obtained. The resources included screen printers, different pick and place machines, infrared soldering machines and component insertion robots. All the experiments were built by using the Petri net tool DESIGN/CPN. A number of hierarchy pages, color sets, places, arcs and transitions representing the PCBA and fuzzy production rules were constructed in the experiments. Simulation runs of the Petri nets model were carried out. The result shows that our approach could be used to guide decision-makers in the design and selection of a suitable PCBA manufacturing strategy. Future extension of our work is described.},
   Keywords	= {printed circuit manufacture, assembling, production control, Petri nets, graph colouring, fuzzy set theory, data structures, resource allocation, computer aided production planning, printed circuit board assembly manufacturing systems, fuzzy colored Petri nets, PCB, PCBA manufacturing system, fuzzy colored Petri net modeling, FCPN modeling, complicated concurrent processes, embedded data structures, uncertainty reasoning, resource allocation strategies, screen printers, pick-and-place machines, infrared soldering machines, component insertion robots, DESIGN/CPN, hierarchy pages, color sets, fuzzy production rules},
   Year 	= {1998} }


% 155) Record # 254
@inproceedings{Burr98,
   Author	= {Burr, Donald},
   Title 	= {Printing Guidelines for BGA and CSP Assemblies},
   BookTitle	= {Surface Mount International},
   Pages	= {417-424},
   Abstract	= {BACKGROUNDER -- Solder Paste Deposition Inspection:The First Step to Quality
Why is Solder Paste Application So Important?Table: AOI  Measurement  - Possible Cause  - Action Considering that repair after solder-paste deposition is at least 10 times less expensive than after reflow, and atleast 50 times less than after in-circuit test, process engineers realize that the time has come for post-print solder-paste inspection.},
   Year 	= {1998} }


% 156) Record # 253
@article{Coit02,
   Author	= {Coit, D. W. and Jackson, B. T. and Smith, A. E.},
   Title 	= {Neural network open loop control system for wave soldering},
   Journal	= {Journal of Electronics Manufacturing},
   Volume	= {11},
   Number	= {1},
   Pages	= {95-105},
   Abstract	= {This paper describes the development of neural networks for the prediction of (1) printed circuit card surface temperature during a wave soldering process, and (2) the quality level of the circuit card assembly soldered connections. Using a combination of production data and design of experiment data, a set of hierarchically connected neural networks were developed and validated. These networks predict thermal behavior of a printed circuit card assembly at various points in the solder process based on process settings and circuit card design data. Then these predictions are used as inputs, together with other parameters, to estimate the quality of solder connections. The system can be used to decrease the number of solder connection defects, reduce set-up and preparation time between lots, and lead to consistent, repeatable process settings without trial production runs or operator tuning efforts. For the wave soldering process studied, this is especially important since the batch size is quite small, quality demands are stringent, and process settings are changed frequently C5290. C7410D. C7480.},
   Keywords	= {electronic engineering computing. neurocontrollers., printed circuit manufacture. . process control., production engineering computing. quality control., statistical analysis. wave soldering},
   Year 	= {2002} }


% 157) Record # 252
@article{Mannan02,
   Author	= {Mannan, S. H.},
   Title 	= {Solder paste reflow modeling},
   Journal	= {Soldering & Surface Mount Technology},
   Volume	= {14},
   Number	= {1},
   Pages	= {18-23},
   Abstract	= {Solder paste printing and reflow are well established processes for producing solder joints in electronic assemblies. Solder paste consists of a dense suspension of solder particles in a liquid medium (vehicle) that acts as an oxide reducing agent (flux) during reflow, cleaning the metal surfaces of oxides. This paper reports on attempts to model the physical and chemical processes occurring during solder paste reflow using computational fluid dynamics (CFD). Axisymmetric, two-dimensional and three-dimensional models are described, and a method of reproducing oxide-like behaviour in these models is introduced},
   Keywords	= {assembling. computational fluid dynamics. oxidation., printed circuit manufacture. . reflow soldering. surface, chemistry. surface cleaning. surface contamination., surface mount technology},
   Year 	= {2002} }


% 158) Record # 251
@article{,
   Author	= {Sang-Yoon, Lee and Yi-Bae, Choi and Kyung-Keun, Park and Young Shik, Jo and Sang-Gun, Lim and Balsamo, A. and Evans, C. and Frank, A. and Knapp, W. and Mana, G. and Mortarino, M. and Sartori, S. and Thwaite, E. G.},
   Title 	= {Grating projection Moire interferometry for high speed 3-D inspection of meso-scale objects},
   Journal	= {Proceedings of the euspen. 2nd International Conference},
   Abstract	= {In today's manufacturing of printed circuit boards, there is an increasing demand on 3-D inspection of meso-scale objects for quality assurance. Two representative examples are the solder paste pattern and ball grid arrays, of which volumes are to be precisely controlled to avoid defects in direct surface mounting of semiconductor chips. Despite the demand, no suitable 3-D inspection techniques are available yet especially for high-speed real time quality control. Well-established monochromatic or white light interferometry is not easy to produce large measuring ranges up to a few millimeters, while widely-used optical triangulation techniques with structured light illumination fail to provide the measurement precision usually required down to a few micrometers. Moire interferometry may be considered as a hybrid approach that combines the two distinct principles of the monochromatic light interferometry and optical triangulation. Thus, when appropriately configured, moire interferometry is capable of filling the gap between the two principles in terms of measurement range and precision. In this paper we propose a new method of 3-D inspection of meso-scale objects, which is in fact based upon the principle of grating projection moire interferometry. This method projects a series of line patterns with predetermined phase shifts onto the target object and detects phase information leading to construction of 3-D profiles. Making the most of modern computer vision and digital signal processing technology allows for high speed measurement of 0.2 sec per 10 mm*10 mm field of view, with resolutions of 10 mu m for both x,y axis and 1 mu m for z axis},
   Keywords	= {automatic optical inspection. diffraction gratings. light, interferometry. moire fringes. printed circuit testing., spatial variables control. spatial variables measurement},
   Year 	= {2001} }


% 159) Record # 250
@article{,
   Author	= {Kirkpatrick, Robert},
   Title 	= {Two-dimensional, Closed-loop Inspection of Stencil Printing},
   Journal	= {Surface Mount Technology},
   Number	= {July},
   Abstract	= {Traditionally, post-print "paste on pad" inspection has been used to determine if the area of deposition on the board exceeds (or lacks) acceptable limits in either direction. While inspection at this point permits misprinted boards to be removed from the system before component placement, it does not address the underlying issue of preventing the misprint in the first place.Real-time, closed-loop inspection delivers immediate productivity benefits by providing a suite of programmable monitoring tools and user-definable limits and alarms. Technology refinements that add functionality include using the system to determine the suitability of stencil aperture sizes against their corresponding board pads, generating a warning if the two appear mismatched. This level of capability is an inherent function of the system's advanced learning process.},
   Keywords	= {- 2Di (DEK Printing Machines Ltd.), ** micro-BGA is a trademark of Tessera.},
   Year 	= {1999} }


% 160) Record # 249
@article{Prasad01,
   Author	= {Prasad, Ray},
   Title 	= {Step 4 — Printing},
   Journal	= {Surface Mount Technology},
   Number	= {April},
   Abstract	= {In the reflow soldering of surface mount assemblies, solder paste connects the leads or terminations of surface mount components to the lands. There are many variables in this process paste, screen printer, paste application method and printing process. In printing solder paste, the substrate is placed on the work holder, held firmly mechanically or by vacuum, and aligned with the aid of tooling pins or vision. A screen or stencil is used to apply solder paste. This article, after briefly describing the paste printing process, will focus on some key issues in squeegee and stencil materials and then discuss printing processes for fine-pitch and through-hole components in a mixed surface mount assembly.To achieve good printing results, a combination of the right paste material (right rheology, i.e., viscosity, metal content, largest powder size and lowest flux activity possible for the application), the right tools (printer, stencil and squeegee blade) and the right process (good registration and clean sweep) are necessary.  Metal squeegees and stencils are the most commonly used printing tools even though they are slightly more expensive than other alternatives. As the industry moves to finer pitches, laser cut and electroformed stencil use, again more expensive options, are becoming more common.  Even the best pastes, equipment and application methods alone cannont ensure acceptable results. The user must control process and equipment variables to achieve good print quality. This is even more critical in fine-pitch printing because it requires very accurate stencil aperture alignment to the land patterns. Finally, there are times when it may be more cost effective to reflow solder through-hole components if they can withstand the reflow temperature.},
   Year 	= {2001} }


% 161) Record # 248
@techreport{,
   Author	= {SEMI},
   Title 	= {SEMI E30-1000 - Generic Model for Communications and Control of Manufacturing Equipment (GEM)},
   Institution	= {Semiconductor Equipment and Materials International},
   Number	= {E30-1000},
   Type 	= {SEMI},
   Month	= {January 12},
   Abstract	= {NOTE: SEMI E30.1, SEMI E30.2, SEMI E30.3, and SEMI E30.5 are no longer published within the SEMI E30 family of standards. They are each published and sold separately on their own pages.The scope of the GEM standard is limited to defining the behavior of semiconductor equipment as viewed through a communications link. The SEMI E5 (SECS-II) standard provides the definition of messages and related data items exchanged between host and equipment. The GEM standard defines which SECS-II messages should be used, in what situations, and what the resulting activity should be. The GEM standard does NOT attempt to define the behavior of the host computer in the communications link. The host computer may initiate any GEM message scenario at any time and the equipment shall respond as described in the GEM standard. When a GEM message scenario is initiated by either the host or equipment, the equipment shall behave in the manner described in the GEM standard when the host uses the appropriate GEM messages. The capabilities described in this standard are specifically designed to be independent of lower-level communications protocols and connection schemes (e.g., SECS-I, SMS, point-to-point, connection-oriented or connectionless). Use of those types of standards is not required or precluded by this standard. GEM defines a standard implementation of SECS-II for all semiconductor manufacturing equipment. The GEM standard defines a common set of equipment behavior and communications capabilities that provides the functionality and flexibility to support the manufacturing automation programs of semiconductor device manufacturers. Equipment suppliers may provide additional SECS-II functionality not included in GEM, as long as the additional functionality does not conflict with any of the behavior or capabilities defined in GEM. Such additions may include SECS-II messages, collection events, alarms, remote command codes, processing states, variable data items (data values, status values, or equipment constants), or other functionality that is unique to a class (etchers, steppers, etc.) or specific instance of equipment.(SEMI E30.4 was re-designated as SEMI E82.)SEMI Referenced Srandards:SEMI E4 — SEMI Equipment Communications Standard 1— Message Transfer (SECS-I)SEMI E5 — SEMI Equipment Communications Standard 2 — Message Content (SECS-II)SEMI E13— Standard for SEMI Equipment Communication Standard Message Service (SMS)SEMI E23 —Specification for Cassette Transfer Parallel I/O Interface},
   Year 	= {1998} }


% 162) Record # 247
@techreport{,
   Author	= {SEMI},
   Title 	= {SEMI E37-0702 - High-Speed SECS Message Services (HSMS) Generic Services},
   Institution	= {Semiconductor Equipment and Materials International},
   Number	= {E37-0702},
   Type 	= {SEMI},
   Month	= {March 3rd},
   Abstract	= {High-Speed SECS Message Services (HSMS) Generic ServicesHSMS provides a means for independent manufacturers to produce implementations which can be connected and interoperate without requiring specific knowledge of one another. HSMS is intended as an alternative to SEMI E4 (SECS-I) for applications where higher speed communication is needed or when a simple point-to-point topology is insufficient. SEMI E4 (SECS-I) can still be used in applications where these and other attributes of HSMS are not required. HSMS is also intended as an alternative to SEMI E13 (SECS Message Services) for applications where TCP/IP is preferred over OSI. It is intended that HSMS be supplemented by subsidiary standards which further specify details of its use or impose restrictions on its use in particular application domains. High-Speed SECS Message Services (HSMS) defines a communication interface suitable for the exchange of messages between computers in a semiconductor factory.SEMI Referenced Standards:SEMI E4 — SEMI Equipment Communication Standard 1 — Message Transport (SECS-I)SEMI E5 — SEMI Equipment Communication Standard 2 — Message Content (SECS-II)Subordinate Documents:SEMI E37.1-0702High-Speed SECS Message Services Single Selected-Session Mode (HSMS-SS)HSMS-SS provides a means for independent manufacturers to produce implementations which can be connected without requiring specific knowledge of one another. HSMS-SS is intended as an alternative to SEMI E4 (SECS-I) for applications where higher speed communication is needed. HSMS-SS is intended as an alternative to SEMI E13 (SECS Message Services) for applications where TCP/IP is preferred over OSI as a communications basis. High-Speed SECS Message Services Single-Session Mode (HSMS-SS) is a subsidiary standard to High-Speed SECS Message Services (HSMS) Generic Services.SEMI E37.2-95High-Speed SECS Message Services General Session (HSMS-GS)HSMS-GS is intended to support the needs of complex systems containing multiple independently accessible subsystems such as cluster tools or track systems. Specifically, procedures are defined to permit access to any individual subsystem or set of subsystems within any complex system. High- Speed SECS Message Services General Session (HSMS-GS) is a subsidiary standard to High-Speed SECS Message Services (HSMS) Generic Services.},
   Year 	= {1998} }


% 163) Record # 246
@techreport{,
   Author	= {MPM Corporation},
   Title 	= {Ultraprint 3000 Host Communications Interface Specification},
   Institution	= {MPM Corporation},
   Number	= {0677},
   Type 	= {TD -},
   Month	= {February 15},
   Keywords	= {SECS, GEM},
   Year 	= {1995} }


% 164) Record # 245
@techreport{,
   Author	= {CyberOptics Corporation},
   Title 	= {Sentry 2000 SECS / GEM Specification},
   Institution	= {CyberOptics Corporation},
   Number	= {7840029 - Rev. A},
   Type 	= {P/N:},
   Month	= {November 20th},
   Keywords	= {SECS, GEM},
   Year 	= {1997} }


% 165) Record # 244
@inproceedings{,
   Author	= {Gong, Shaofang},
   Title 	= {System integration for Bluetooth and WLAN},
   BookTitle	= {Components & Electronics Production},
   Address	= {Norrköping, Sweden},
   Publisher	= {Bluetronics AB},
   Year 	= {2000} }


% 166) Record # 243
@article{,
   Author	= {Davison, Tom and Barthel, Bill},
   Title 	= {Roadmapping the PCB Assembly Future},
   Journal	= {Circuits Assembly},
   Number	= {May},
   Pages	= {70-75},
   Month	= {May},
   Abstract	= {Recently published, the 1998 NEMI Roadmap outlines keys to assembly’s future success.The National Electronics Manufacturing Initiative (NEMI, Herndon, VA) recently published its 1998 roadmap. This document identifies the key technology and infrastructure developments required to ensure the competitiveness of North American electronics manufacturing companies over the next decade. The roadmap was designed to guide investment in research, development and deployment for electronics manufacturing. The 1998 roadmap involved the input of more than 400 individuals from 175 original equipment manufacturers (OEMs), electronics manufacturing services (EMS) providers, suppliers, government agencies, universities and related consortia/trade associations. These individuals defined future manufacturing needs by determining “product emulators” for five product sectors —low cost, handheld, cost/performance, high performance and harsh environment — and used these needs to forecast trends for each of 17 technology areas, including board assembly.},
   Keywords	= {1998 NEMI Roadmap},
   Year 	= {1999} }


% 167) Record # 241
@misc{,
   Author	= {Speedline Technologies},
   Title 	= {Idle Time Recovery Ultraprint 3000 Series},
   Publisher	= {HTTP},
   Volume	= {1999},
   Number	= {January 4},
   Abstract	= {As paste is printed its viscosity decreases until it gets to its working viscosity point. This is the optimum printing condition for the paste. If the paste is allowed to sit idle on the stencil for any period of time, it will return to its original viscosity making the paste difficult to print with on the first few passes. As a result a special programmable stroke is necessary to recover from this condition. The Idle Time Recovery function allows the user to predefine the stroke after a certain amount of idle time has elapsed such that the next board that is printed will be usable and will be sent downstream.},
   Year 	= {2002} }


% 168) Record # 240
@article{,
   Author	= {Chandrasekaran, S. and Golub, G. H. and Gu, M. and Sayed, A. H.},
   Title 	= {Parameter Estimation in the Presence of Bounded Data Uncertainties},
   Journal	= {SIAM Journal on Matrix Analysis and Applications},
   Volume	= {19},
   Number	= {1},
   Pages	= {235-252 (electronic)},
   Abstract	= {We formulate and solve a new parameter estimation problem in the presence of data uncertainties. The new method is suitable when a priori bounds on the uncertain data are available, and its solution leads to more meaningful results, especially when compared with other methods such as total least-squares and robust estimation. Its superior performance is due to the fact that the new method guarantees that the elect of the uncertainties will never be unnecessarily over-estimated, beyond what is reasonably assumed by the a priori bounds. A geometric interpretation of the solution is provided, along with a closed form expression for it. We also consider the case in which only selected columns of the coefficient matrix are subject to perturbations.},
   Keywords	= {least-squares estimation, regularized least-squares, ridge regression, total least-squares, robust estimation, modeling errors, secular equation, TLS},
   Year 	= {1998} }


% 169) Record # 239
@article{,
   Author	= {Björck, Åke and Heggernes, P. and Matstoms, P.},
   Title 	= {Methods for large scale total least squares problems},
   Journal	= {SIAM Journal on Matrix Analysis and Applications},
   Volume	= {22},
   Number	= {2},
   Pages	= {413-429 (electronic)},
   Abstract	= {The solution of the total least squares (TLS) problems, min E,f |(E, f)|_F subject to (A + E)x = b + f, can in the generic case be obtained from the right singular vector corresponding to the smallest singular value sigma n+1 of (A, b). When A is large and sparse (or structured) a method based on Rayleigh quotient iteration (RQI) has been suggested by BjöNorck. In this method the problem is reduced to the solution of a sequence of symmetric, positive de.nite linear systems of the form (ATA. �PƒÐ2I)z = g, where �PƒÐ is an approximation to ƒÐn+1. These linear systems are then solved by a preconditioned conjugate gradient method (PCGTLS). For TLS problems where A is large and sparse a (possibly incomplete) Cholesky factor of ATA can usually be computed, and this provides a very e.cient preconditioner. The resulting method can be used to solve a much wider range of problems than it is possible to solve by using Lanczos-type algorithms directly for the singular value problem. In this paper the RQI-PCGTLS method is further developed, and the choice of initial approximation and termination criteria are discussed. Numerical results con.rm that the given algorithm achieves rapid convergence and good accuracy.This paper considers computational methods for solving large scale total least squares problems (TLS). When the coefficient matrix $A$ is large and sparse, based on the Rayleigh quotient iteration method (RQI) for the TLS proposed by Bjorck, and combining it with a preconditioned conjugate gradient method (PCGTLS), the authors develop a RQIPCGTLS method. The method provides a very efficient preconditioner, and can be used to solve a wider range of problems than it is possible to solve by Lanczos-type algorithms directly for the singular value problem. The choice of initial approximation and termination criteria are discussed, and numerical results confirm that the given algorithm achieves rapid convergence and good accuracy.},
   Keywords	= {TLS},
   Year 	= {2000} }


% 170) Record # 238
@article{,
   Author	= {Mastronardi, Nicola  and Lemmerling, Philippe  and Van Huffel, Sabine},
   Title 	= {Fast structured total least squares algorithm for solving the basic deconvolution problem},
   Journal	= {SIAM Journal on Matrix Analysis and Applications},
   Volume	= {22},
   Number	= {2},
   Pages	= {533-553 (electronic)},
   Abstract	= {In this paper we develop a fast algorithm for the basic deconvolution problem. First we show that the kernel problem to be solved in the basic deconvolution problem is a so-called structured total least squares problem. Due to the low displacement rank of the involved matrices and the sparsity of the generators, we are able to develop a fast algorithm. We apply the new algorithm on a deconvolution problem arising in a medical application in renography. By means of this example, we show the increased computational performance of our algorithm as compared to other algorithms for solving this type of structured total least squares problem. In addition, Monte- Carlo simulations indicate the superior statistical performance of the structured total least squares estimator compared to other estimators such as the ordinary total least squares estimator.The basic deconvolution problem (BDP) consists in estimating the impulse response $x\sb 0$ starting from the noisy input $(u(k))$ and the noisy output $(y(k))$. BDPs arise in reflection seismology, telecommunications, and medical applications, among others. It is shown that the kernel problem for solving a BDP is a structured total least squares problem. Because of the low displacement rank of the matrices involved and the sparsity of the generators, a fast algorithm can be developed. The BDP to which this new fast algorithm is applied is one arising in medicine, namely renography. Through this example, computational performance of the new algorithm is compared with other algorithms for solving structured least squares problems.},
   Keywords	= {deconvolution, structured total least squares, displacement rank, structured total least norm, generalized Schur algorithm, TLS},
   Year 	= {2000} }


% 171) Record # 237
@article{Owczarek90b,
   Author	= {Owczarek, J.A. and Howland, F.L.},
   Title 	= {A study of the off-contact screen printing process. II. Analysis of the model of the printing process},
   Journal	= {Components, Hybrids, and Manufacturing Technology, IEEE Transactions on [see also IEEE Trans. on Components, Packaging, and Manufacturing Technology, Part A, B, C]},
   Volume	= {13},
   Number	= {2},
   Pages	= {368-375},
   Abstract	= {For pt.I see ibid., vol.13, no.2, p.358-67, 1990. The analysis presented is concerned with the derivation of equations which allows calculation of the thickness of dry paste deposited on a substrate in the off-contact screen printing process. The rheological properties of the paste are approximated by those of a power-law fluid. Deformed squeegee shape in the paste deposition region is considered to be that of a wedge. The equations show that the height of the deposited paste depends on the magnitude of the equivalent paste height under the squeegee and on the paste flow speed under the squeegee. The equivalent paste height under the squeegee depends, for a given screen, on the deformability of the squeegee and on the emulsion height. The paste flow speed under the squeegee depends, for a given paste and screen, on the magnitude of the pressure buildup ahead of the squeegee. The pressure buildup in turn is a function of the squeegee deformation characteristics and of squeegee translational speed.},
   Keywords	= {off-contact screen printing process, model, thickness, dry paste, rheological properties, power-law fluid, squeegee shape, paste deposition region, equivalent paste height, paste flow speed, deformability, emulsion height, pressure buildup, squeegee translational speed, integrated circuit technology, printing, thick film circuits, SPP equations},
   Year 	= {1990} }


% 172) Record # 236
@article{Owczarek90a,
   Author	= {Owczarek, J.A. and Howland, F.L.},
   Title 	= {A study of the off-contact screen printing process. I. Model of the printing process and some results derived from experiments},
   Journal	= {Components, Hybrids, and Manufacturing Technology, IEEE Transactions on [see also IEEE Trans. on Components, Packaging, and Manufacturing Technology, Part A, B, C]},
   Volume	= {13},
   Number	= {2},
   Pages	= {358-367},
   Abstract	= {A physical model of the screen printing process is described. Interrupted printing tests provided guiding information on the flow pattern in the paste during the deposition process. The paste flow region ahead of the squeegee was divided into three regions: the pressurization region (region I), the downward screen cross-flow region (region II), and the paste accumulation region (region III). During printing, the squeegee tip becomes deformed and its angle of attack decreases. Region I extends from the leading edge of the deformed squeegee tip to the beginning of the deformation region. As a result of pressure buildup in region I ahead of the squeegee, there is a flow of paste under the squeegee. The paste deposition process depends mainly on the flow process in region I. Analysis of experiments indicates that the squeegees used deform so that their fronts can be approximated by a wedge. The angles of hard squeegees decrease by approximately 20 degrees from the undeformed angle of 45 degrees . The corresponding angle decrease for soft squeegees is on the order of 30-40 degrees . The vertical forces acting on the squeegees were estimated to be between 60 and 47 lbf. The average speed of the paste under the squeegee, caused by the developed hydrodynamic pressure, was found to be between 0.1 and 0.2 of the squeegee speed.},
   Keywords	= {off-contact screen printing process, printing process, physical model, guiding information, flow pattern, paste, deposition process, pressurization region, downward screen cross-flow region, paste accumulation region, squeegee tip, hard squeegees, vertical forces, hydrodynamic pressure, integrated circuit technology, printing, thick film circuits, SPP equations},
   Year 	= {1990} }


% 173) Record # 235
@inproceedings{,
   Author	= {Liu, J. and Tillstrom, A.},
   Title 	= {Development of 0.5 and 0.65 mm pitch QFP technology in surface mounting},
   BookTitle	= {Electronic Manufacturing Technology Symposium, 1993, Fifteenth IEEE/CHMT International},
   Address	= {IVF, Swedish Inst. of Production Eng. Res., Sweden},
   Pages	= {52-62},
   Abstract	= {Results from a series of experimental studies on the effect of assembly process conditions and design rules on solder joint quality for 0,5 and 0,65 mm pitch surface mounted devices are summarized. A four-layer 200 /spl times/ 300 mm/sup 2/ test board is used for experimental purposes. The main objective of the work is to optimize design and manufacturing conditions for 0.5 mm pitch quad flatpack (QFP) components. A large number of design and process parameters are studied using factorial analysis. The parameters studied are pad width, lead inplanarity and lead sweep of component, placement position, squeegee speed and squeegee angle, number of strokes and surrounding temperature. It is found that at optimum design and process conditions, zero defect failure rate can be obtained for the 0.65 mm pitch components, while for the 0.5 mm pitch component, 400 ppm in solder joint failure rate can be obtained.},
   Keywords	= {surface mount technology, fine-pitch technology, reflow soldering, circuit optimisation, integrated circuit yield, design of experiments, statistical analysis, statistical process control, quad flatpack technology, fine pitch components, optimum conditions, process yield, four-layer test board, surface mounting, assembly process conditions, design rules, solder joint quality, factorial analysis, pad width, lead inplanarity, lead sweep, placement position, squeegee speed, squeegee angle, number of strokes, surrounding temperature, zero defect failure rate, 0.5 mm, 0.65 mm},
   Year 	= {1993} }


% 174) Record # 234
@inproceedings{Howarth+Silvester99,
   Author	= {Howarth, M. and Silvester, S.A. and Lacey, M. and Sivaygonathan, K.},
   Title 	= {An investigation into the printing characteristics and mechanical dynamics of advanced squeegee mechanisms},
   BookTitle	= {Electronics Manufacturing Technology Symposium, 1999. Twenty-Fourth IEEE/CPMT},
   Address	= {Dept. of Mech. & Manuf. Eng., Nottingham Trent Univ., UK},
   Pages	= {178-184},
   Abstract	= {The new breed of solder paste deposition systems, such as the DEK ProFlow, incorporate a contained solder paste chamber enabling independent control of machine parameters, pressure, down force and print speed. Previous work by Ekere et al. (1994) and Monaghan et al. (1991-2) have modelled conventional squeegee systems, but only part of this work is applicable to the new mechanism. Practical experimentation has been employed, both to gain an appreciation of the printing characteristics in general and to serve as reference for purely analytical models. Flow visualisation experiments have provided useful indications of flow dynamics within the print head, highlighting dominant flow patterns, velocity profiles and other phenomena such as evidence of air entrapment or cavitation. The FIDAP CFD package is used to perform detailed analysis, providing measures of data not practically obtainable through physical measurement. Pressure, shear and temperature profiles are obtained for a range of operating conditions and their influence on ink/solder paste transfer can be evaluated, leading to the identification of operational limits. Results from the FIDAP model compare very well with the experimental work and have identified the critical areas of the squeegee mechanism. This analysis is now being used to refine the process, to extend its application to lower viscosity materials and to incorporate simpler control systems than have been found to be necessary with conventional squeegee mechanisms (Lotfi and Howarth, 1998; Zhuang et al., 1997).},
   Keywords	= {soldering, assembling, printed circuit manufacture, flow visualisation, computational fluid dynamics, electronic engineering computing, viscosity, cavitation, printing characteristics, mechanical dynamics, squeegee mechanisms, solder paste deposition systems, DEK ProFlow, contained solder paste chamber, machine parameter control, pressure control, down force control, print speed control, squeegee systems, analytical models, flow visualisation, flow dynamics, print head, dominant flow patterns, velocity profiles, air entrapment, cavitation, FIDAP CFD package, temperature profiles, shear profiles, pressure profiles, operating conditions, solder paste transfer, operational limits, FIDAP model, critical squeegee mechanism areas, process refinement, viscosity, control systems},
   Year 	= {1999} }


% 175) Record # 232
@inproceedings{Feldmann93,
   Author	= {Feldmann, K. and Sturm, J.},
   Title 	= {Yield improvement in SMT production by integrated process monitoring and testing},
   BookTitle	= {Electronic Manufacturing Technology Symposium, 1993, Fifteenth IEEE/CHMT International},
   Address	= {Inst. for Manuf. Autom. & Production Syst., Erlangen Univ., Germany},
   Pages	= {229-234},
   Abstract	= {Almost 30-50% of fabrication costs in electronics production are caused by testing and repair operations. A strategy for yield improvement requires strong dedication to causal relationships and specification of process and product quality. Critical process parameters and their causal effects on product quality must be analyzed. Once critical process parameters are addressed, control strategies can be developed to assure high first pass yields. An overview of ongoing work that has been performed to establish a surface mount technology (SMT) production line with closed loop quality control via direct process monitoring capabilities and integrated inspection operations is given. For different inspection tasks, 3-D laser and X-ray inspection is applied. Process parameter as well as test and inspection results are gathered online. Thus, interrelationships between process steps beginning from material inspection, solder paste application, components placement, reflow soldering and final inspection can be analyzed.},
   Keywords	= {surface mount technology, printed circuit manufacture, process control, automatic optical inspection, closed loop systems, reflow soldering, printed circuit testing, economics, quality control, design of experiments, statistical process control, CAD/CAM, computer integrated manufacturing, printed circuit assembly, design of experiments, AOI, CAD/CAM, 3D laser inspection, SMT production, yield improvement, product quality, critical process parameters, control strategies, high first pass yields, closed loop quality control, direct process monitoring capabilities, integrated inspection operations, X-ray inspection, material inspection, solder paste application, components placement, reflow soldering, final inspection, fuzzy logic, DOE},
   Year 	= {1993} }


% 176) Record # 231
@misc{,
   Author	= {Kaiser, Clement and Bourrieres, Francis},
   Title 	= {Apparatus and method for deposition of a viscious material on a substrate},
   Publisher	= {Novatec S.A.},
   Month	= {2001/01/09},
   Abstract	= {A method and apparatus for carrying out the deposition of a paste like and/or viscous material, such as solder paste, on a substrate through the apertures or openings of a stencil are provided for use, for example, in screen printing in the mounting of components on a printed circuit board. A hollow receptacle for the material is provided with a lower aperture which is orientated towards the stencil. The lower aperture of the receptacle is delimited defined such that its length is adjusted to the dimensions of the substrate and that its width is a function of the speed of execution of the screen printing. This delimitation is implemented by sealing members preferably comprising two wipers on respective sides of the aperture, transverse with respect to the direction of displacement of the receptacle, orientated one towards the other and inclined with respect to the horizontal between the wipers at an angle of between 120&deg; and 180&deg;. The wipers are transversal and intersecting with the section of the receptacle. A pressure is exerted upon the viscous material in the receptacle. This pressure pushes the material towards the stencil between the wipers to distribute it over the stencil, and pushes the product upon the wipers, applying pressure to the wipers in order to push the wipers onto the stencil. The receptacle is displaced across the stencil at the same time that the pressure is exerted on the material.},
   Keywords	= {USPAT SPP},
   ISBN	= {118-406-000 118-410-000 118-504-000},
   Year 	= {2001} }


% 177) Record # 230
@misc{Tani01,
   Author	= {Tani, Okie},
   Title 	= {Method and apparatus for cleaning screen used in screen printing machine},
   Publisher	= {Tani Denkikogyo Co. Ltd},
   Month	= {2001/05/22},
   Abstract	= {The invention encompasses method and apparatus for cleaning screen used in screen printing machine for printing of solder paste onto a surface of a printed circuit board. The apparatus includes two upper and lower cleaning chambers 4, 5 which are provided on upper and lower sides of the screen 2 in opposed relationship with each other in such a manner that the two chambers are in watertight contact with the upper and lower surfaces 2A, 2B, of screen 2, respectively and are communicated with each other through openings 2C in the screen 2. The upper and lower cleaning chambers are essential components of the apparatus for carrying out cleaning the solder paste residue adhered to inner peripheral surfaces of the openings 2C in the screen 2 as well as the solder paste residue adhered to the upper and lower surfaces 2A, 2B from the screen 2. A wash liquid supply means is provided for supplying wash liquid into each of the chambers 4, 5 to wash away the past residues adhered to the screen 2.},
   Keywords	= {USPAT SPP},
   ISBN	= {101-424-000 101-425-000 134-093-000 134-199-000},
   Year 	= {2001} }


% 178) Record # 229
@misc{Nanzai94,
   Author	= {Nanzai, Takashi},
   Title 	= {Method for screen printing of paste},
   Publisher	= {Tani Denkikogyo Co., Ltd.},
   Month	= {1994/05/10},
   Abstract	= {A method for printing solder paste onto a surface of a printed circuit board through the medium of a screen having openings. The method includes feeding the paste into a chamber of a dispenser, dispensing the paste contained in the chamber onto a first side of the screen and onto the surface of the board from the dispenser through a slit-like aperture, removing paste residue from the first side of the screen by a blade extending from a first cleaning apparatus, removing paste residue from a second side of the screen by another blade extending from a second cleaning apparatus, and sucking and transporting the paste residue adhered to inner peripheral surfaces of openings in the screen as well as the paste residue being removed from the second side of the screen by a vacuum device connected to the second cleaning apparatus. The slit-like aperture of the dispenser is formed by a fixed front wall and a moveable rear wall selectively moving toward and away from the fixed front wall.},
   Keywords	= {USPAT SPP},
   ISBN	= {101-425-000 101-129-000},
   Year 	= {1994} }


% 179) Record # 228
@misc{Metzger87,
   Author	= {Metzger, David B.  and Johnson, Glenn S. and Bramel, Michael D.},
   Title 	= {Method and apparatus for screen printing solder paste onto a substrate with device premounted thereon},
   Publisher	= {General Motors Corporation},
   Month	= {1987/07/07},
   Abstract	= {A printing screen for screen printing fabrication substances such as solder paste has an aperture formed therein so that the screen may be placed on a substrate surface with a pre-mounted device extending through the aperture. A metal cap is bonded to the screen over the pre-mounted device to protect the device against damage during a subsequent screen printing operation. Different elements may, therefore, be bonded to a substrate in completely independent steps without the need for fluxing operations in later bonding operations.},
   Keywords	= {USPAT SPP},
   ISBN	= {156-250-000 118-504-000 156-252-000 427-096-000 427-282-000},
   Year 	= {1987} }


% 180) Record # 227
@misc{Tomomatsu99,
   Author	= {Tomomatsu, Michinori and Sakaue, Takaaki and Murakami, Minoru},
   Title 	= {Solder paste screen printing apparatus and solder paste screen printing method},
   Publisher	= {Matsushita Electric Industrial Co., Ltd.},
   Month	= {1999/12/07},
   Abstract	= {There is disclosed a solder paste screen printing apparatus and a solder paste screen printing method, in which a force of pressing of a squeegee can be adjusted delicately and accurately so as to effect the printing of solder paste with the optimum pressing force. A squeegee is connected to a lower end of a rod of a cylinder, and a load cell is provided above the rod. A first pressure and a second pressure are applied respectively to an upper chamber and a lower chamber of the cylinder. A load, applied to the load cell, is measured while varying the level of the first pressure, and the pressure measurement for the pressing force is effected in accordance with the measured load. In accordance with this result, the instruction pressure for the cylinder, which is necessary for obtaining the optimum pressing force, is determined, and then the printing of solder paste onto a substrate is started with this instruction pressure.},
   Keywords	= {USPAT SPP},
   ISBN	= {101-123-000 101-124-000},
   Year 	= {1999} }


% 181) Record # 226
@misc{Wachi+etal00,
   Author	= {Wachi, Akihiko and Yanachi, Seishiro and Kakishima, Nobuyuki  and Matsumoto, Masaya},
   Title 	= {Screen printing method and screen printing apparatus},
   Publisher	= {Matsushita Electric Industrial Co., Ltd.},
   Month	= {2000/10/17},
   Abstract	= {PCT No. PCT/JP97/02027 Sec. 371 Date Dec. 4, 1998 Sec. 102(e) Date Dec. 4, 1998 PCT Filed Jun. 12, 1997 PCT Pub. No. WO97/48258 PCT Pub. Date Dec. 18, 1997  Coordinate positions of openings and lands on a screen and a first circuit board are recognized by a recognition camera and a display device. A correction amount for movement of the stage is calculated by a control device only for the first circuit board. Then, the correction of movement of the stage is executed for the second and following circuit boards by utilizing the correction amount.},
   Keywords	= {USPAT SPP},
   ISBN	= {101-129-000 101-126-000 101-DIG-0 36 033-620-000},
   Year 	= {2000} }


% 182) Record # 225
@misc{Hoebener98,
   Author	= {Hoebener, Karl Grant  and Hubacher, Eric Max   and Partridge, Julian Peter},
   Title 	= {Print circuit board product with stencil controlled fine pitch solder formation for fine and coarse pitch component attachment},
   Publisher	= {International Business Machines Corporation , Motorola, Inc.},
   Month	= {1998/10/20},
   Abstract	= {A product created through the reflow of low melting point solder on select contacts of a printed circuit board. In one form, the printed circuit board has fine pitch devices, including flip-chip integrated circuits, connected to a board having conventional coarse pitch surface. The fine pitch contacts of the board are exposed through holes in a stencil characterized in its ability to withstand solder reflow temperatures, not be wettable by solder, and have a coefficient of thermal expansion relatively matching the printed circuit board. Low temperature solder paste is screen deposited into the stencil openings. With the stencil fixedly positioned on the board, the solder paste retained by the stencil pattern is reflowed to selectively form on the underlying contacts of the printed circuit board. Thereafter, the stencil is removed from the board and the board is subject to previously practiced depositions of flux and paste in preparation for fine and coarse pitch component placement and ensuing solder reflow. The fine contact pitch and coarse contact pitch differ by nominal factor of two or more.},
   Keywords	= {USPAT SPP},
   ISBN	= {361-777-000 174-261-000 228-180-021 228-180-022 361-760-000 361-774-000},
   Year 	= {1998} }


% 183) Record # 224
@misc{Marcoux98,
   Author	= {Marcoux, Richard A.  and Curtin, Mark},
   Title 	= {Cartridge squeegee head with engagement locking mechanism},
   Publisher	= {Transition Automation, Inc.},
   Month	= {1998/08/11},
   Abstract	= {A cartridge squeegee head for solder paste machines. A squeegee blade is fixed to a coupling block. The coupling block is characterized by a coupling slot formed therein. The coupling block pivots and puts the squeegee blade into a print stroke position. The squeegee blade is then driven across the stencil foil surface.},
   Keywords	= {USPAT SPP},
   ISBN	= {101-123-000 101-127-000},
   Year 	= {1998} }


% 184) Record # 223
@misc{,
   Author	= {Takahiro, Fukagawa and Michinori, Tomomatsu and Kimiyuki, Yamasaki and Seikoh, Abe and Minoru, Murakami and Yuji, Otake and Kunihiko, Tokita and Masayuki, Mantani and Seiichi, Miyahara},
   Title 	= {Apparatus and method of screen printing},
   Abstract	= {A screen-printing apparatus for printing creamy solder paste on a substrate by attaching a screen mask to the substrate. A laser-measuring device mounted in the apparatus measures the top surface of the screen mask at a printing position and the top of the substrate at a substrate-measurement position by three-dimensional measurement, and detects a shape of the substrate or the screen mask, and determines whether or not they are acceptable. After screen printing is completed, the substrate and the screen mask undergo a printing inspection where their shapes are inspected. This provides not only inspection data of the printing results but also data for identifying the causes of print failures. As a result, the screen-printing apparatus, which has high-printing accuracy and can prevent printing failures from occurring, is provided},
   Keywords	= {USPAT SPP},
   ISBN	= {US2002007743},
   Year 	= {2002} }


% 185) Record # 222
@article{,
   Author	= {Wu, C.J. and Sung, A.H.},
   Title 	= {A general purpose fuzzy controller for monotone functions},
   Journal	= {Systems, Man and Cybernetics, Part B, IEEE Transactions on},
   Volume	= {26},
   Number	= {5},
   Pages	= {803-808},
   Abstract	= {In this work, a general purpose fuzzy controller is proposed to handle the class of monotonic functions. A set of rules on the selection of fuzzy subsets and decision tables based on the mean-of-inversion (MOI) defuzzification method for guaranteed convergence and accuracy is given and proved. Unlike the mean-of-maximum (MOM) and the center-of-area (COA) methods, the MOI method defuzzifies each fired rule separately instead of superimposing fired rules before defuzzification.},
   Keywords	= {fuzzy control, controllers, decision tables, general purpose fuzzy controller, monotone functions, fuzzy subsets, decision tables, mean-of-inversion defuzzification method},
   Year 	= {1996} }


% 186) Record # 221
@book{Prasad97,
   Author	= {Prasad, Ray P.},
   Title 	= {Surface mount technology : principles and practice},
   Publisher	= {Chapman & Hall},
   Address	= {New York},
   Edition	= {2nd},
   Keywords	= {Surface mount technology.},
   Year 	= {1997} }


% 187) Record # 220
@book{,
   Author	= {Zarrow, Phil and Kopp, Debra},
   Title 	= {Surface mount technology terms and concepts},
   Publisher	= {Newnes},
   Address	= {Boston},
   Year 	= {1997} }


% 188) Record # 219
@book{,
   Author	= {Hwang, Jennie S.},
   Title 	= {Solder paste in electronics packaging : technology and applications in surface mount, hybrid circuits, and component assembly},
   Publisher	= {Van Nostrand Reinhold},
   Address	= {New York},
   Keywords	= {Printed circuits Design and construction., Solder pastes., Surface mount technology.},
   Year 	= {1989} }


% 189) Record # 218
@book{,
   Author	= {Hwang, Jennie S.},
   Title 	= {Modern solder technology for competitive electronics manufacturing},
   Publisher	= {McGraw-Hill},
   Address	= {New York},
   Series	= {Electronic packaging and interconnection series},
   Keywords	= {Electronic packaging., Solder and soldering.},
   Year 	= {1996} }


% 190) Record # 217
@article{,
   Author	= {Sim, Kenneth and Belmonte, Joe},
   Title 	= {Maximizing screen printing throughput},
   Journal	= {Surface-mount Technology},
   Number	= {November},
   Month	= {November},
   Year 	= {1999} }


% 191) Record # 216
@article{,
   Author	= {Sim, Kenneth and Nauss, Ed and O’Neal, Dennis and Renda, Joe},
   Title 	= {Printing: The need for speed, accuracy and efficiency},
   Journal	= {Circuits Assembly},
   Number	= {August},
   Month	= {August},
   Abstract	= {Know your printer before buying it. As changes in solder-paste technology challenge maintenance of proper printing parameters, an understanding of your printer options has become essential.As chip shooters become faster and the materials involved in placement processes improve, one manufacturing platform above all else will be called upon to provide reduced cycle times while maintaining 6s quality: the stencil printer. Stencil printing is, and is likely to remain, the most viable means of depositing solder paste onto PCBs for reflow soldering. An increasing demand is being placed upon stencil-printer manufacturers to print leading-edge materials in order to solve process-related issues. Changes in solder-paste technology, for example volatile organic-compound-free (VOC-free) and no-lead formulations, present challenges to maintaining proper printing parameters.},
   Year 	= {2000} }


% 192) Record # 215
@misc{,
   Author	= {Kelley, Robert and Tan, Doreen},
   Title 	= {A 3-D Solder Paste Inspection Strategy for CSPs and 0201s},
   Publisher	= {HTTP},
   Volume	= {1999},
   Number	= {January 4},
   Abstract	= {The introduction and usage of smaller component packaging in electronic assemblies are driven by the need to increase their I/O density and to reduce their size. Two of the more popular emerging packaging technologies are Chip Scale Packages (CSPs) and 0201 discrete passive device packages. While CSPs are currently in high volume production with smaller pitch down to .5 mm on the horizon, 0201 packages are reportedly in full production now by a few manufacturers with many others planing to be in full production later this year. These new packages are initially expected to be used in hand held and portable products where size and weight are critical factors in the success of the product. Even without the usage of the 0201 and CSP packaging, solder paste related defects continue to top many manufacturers lists as the process step responsible for the greatest percentage of end of line defects, typically in the 40-50% range [1,2]. The introduction of these new packages into the manufacturing process will present new challenges for controlling the solder paste printing process.The solder paste deposition process continues to be the leading source of end of line defects in SMT assembly process. Process changes driven by the usage of emerging CSP and 0201 packaging technology will further complicate the paste deposition process. Solder paste volume will continue to be the best predictor of a good solder joint at the end of the line. In-line, 3D solder paste inspection can be used to detect solder paste problems before they result in expensive re-work or scrap. End of line inspection may prevent defective parts from leaving the factory, but does little to improve the quality of the product in the first place. A more effective strategy would be to improve first pass yields and prevent these defects from occurring in the first place.},
   Keywords	= {3D 2D},
   Year 	= {2002} }


% 193) Record # 214
@article{Johnson02,
   Author	= {Johnson, Alden and Boyes, Bob},
   Title 	= {Stencil Printing Basics: Equipment Materials and Process Requirements},
   Journal	= {Chip Scale Review},
   Number	= {January/February},
   Abstract	= {Optimizing fine-pitch electronics assembly requires a careful review of the complete process. Each variation of device, lead spacing, substrate, material and build-rate schedule requires specific parameters to ensure high yields. Additionally, selecting the best combination of materials, equipment and data analysis systems can greatly reduce development time and costs. In stencil printing, defects are typically caused by one or more of the following: poor alignment between the substrate and stencil, incorrect paste chemistry or variations in the amount of paste deposited. To eliminate defects, the capabilities of the printing equipment and the materials selected (substrate, paste type and stencil design) should be examined closely.},
   Year 	= {2002} }


% 194) Record # 213
@article{,
   Author	= {Morini, John and Cronin, John and O'Neal, Dennis},
   Title 	= {Optimizing printer-based solder paste inspection},
   Journal	= {Circuits Assembly},
   Volume	= {13},
   Number	= {3},
   Pages	= {32-37},
   Month	= {Mar},
   Abstract	= {Today, the device mix on any given board can include any combination of ultra small 0201s, extremely fine pitch quads, delicate ceramic BGAs, plus large connectors and power supply devices. Modern design takes advantage of every millimeter of board real estate creating high density that was unimaginable a decade ago. At the same time that many components are substantially shrinking in size and pitch, physical board dimensions are moving to opposite ends of the spectrum; some are extremely small while others are over 27-30 inches and larger. Both types of board configuration bring specific sets of processing challenges. Solder paste stencil printing is one of the first process steps to feel the pressure. The mixed solder volumes needed to create a board’s overall pattern of high and low mass deposits, combined with the ever increasing requirement for tighter cycle times, are a true printing challenge. Remaining competitive in the world of electronics manufacturing demands always aspiring to the goal of Zero Defect production. The level of tolerance for defects is smaller than the space between the leads of a fine pitch quad. Two ways to support this elusive goal is through integrated inspection and actuated SPC. This paper will explore how printer-based, in-line 2D solder paste inspection technology (2D Inspection) can be optimized to meet and defeat some of the toughest stencil printing production challenges.It is estimated that up to 90% or more of all print defects and trends can be identified by verifying the amount of paste covering the target pad. This method identifies the lack of paste being deposited on the pad resulting in unacceptable solder joints.Optimizing the 2D inspection process, using efficient strategies and taking advantage of all tools that are available in this type of program will greatly increase the power of this useful utility. It basically turns the printer itself into a “smart” machine that is a true engineering partner on the production line. The engineer will have full control of current stencil printing variables with the ability to flag even the slightest process drift. The longterm ability to analyze a variety of parameters over time also gives the engineer the tools to make knowledgeable decisions for detailed improvement in specific areas, streamlining the full solder deposition process.Inspecting a PCB immediately after printing verifies the printing operation itself to characterize the process. The SPC features, both immediate and long term establish a pattern of catching and eliminating minor issues before they turn into real problems. This translates into immediate cost savings, and brings the total process closer to the elusive goal of “Zero Defect” production. As the board manufacturer takes advantage of the programming flexibility and full SPC capabilities offered by optimized 2D in-line solder paste inspection the bottom-line profit will increase substantially. When fully implemented, this type of utility will give the user a quick return on investment and keep adding value by showing a substantial gain in board quality and higher yield that will continually increase over time. The reduction in board defects and virtual elimination of scrap add dollars previously lost, back to the company profit margin. The increases that can be seen from this investment in overall yield are only limited by the production capability of the facility itself.},
   Keywords	= {SPP defects, Statistical process control, Printed circuit boards, Inspection,, Process engineering, Soldered joints, Chip scale packages,, Production control, Solder pastes, E 538.1.1 Soldering, E 731.1 Control Systems, E 913.3.1, Inspection, E 913.1 Production Engineering, E 714.2 Semiconductor, Devices and Integrated Circuits, S 538.1.1 Soldering, S 731.1, Control Systems, S 913.3.1 Inspection, S 913.1 Production, Engineering, S 714.2 Semiconductor Devices and Integrated Circuits},
   Year 	= {2002} }


% 195) Record # 212
@misc{,
   Author	= {Asymtech},
   Title 	= {Heli-flow pump (Servo-controlled auger pump)},
   Publisher	= {HTTP},
   Volume	= {2002},
   Number	= {May 30},
   Abstract	= {The DV-7000 Heli-Flow™ pump's newest generation of encodedauger pumps are available in a luer- or footed-needle designwith interchangeable cartridges. Customers can purchasemultiple cartridges for different fluid types, resulting in alower investment in pumps. The newest generation of theDV-7000 has a hardened auger for use with filled epoxymaterials, offers a high flow rate for fast dam writing, andis easy to service.},
   Year 	= {2002} }


% 196) Record # 211
@misc{,
   Author	= {EKRA Eduard Kraft GmbH},
   Title 	= {2 1 /2 D Inspection System},
   Publisher	= {HTTP},
   Volume	= {2002},
   Number	= {May 25},
   Abstract	= {The patented 2 1/2 D™ post print inspection system from EKRA is an important factor in significantly reducing the failure rate in production processes. The aim of this system is to determine possible causes of faults even before printing, or to recognize faults that have already occurred immediately after printing and to initiate appropriate measures.},
   Keywords	= {EKRA, 2D - 2 1/2 D inspection},
   Year 	= {2002} }


% 197) Record # 210
@misc{,
   Author	= {Heininger, Nils},
   Title 	= {Polymer Stencils for Fine Pitch Applications},
   Publisher	= {HTTP},
   Volume	= {2002},
   Number	= {May 25},
   Abstract	= {The experts are unanimous: laser technologies are increasingly gaining in importance for future production processes in the electronic industry. A key role is layed by laser systems in the miniaturisation of electronic components in particular. The putting into practice of innovative concepts or installation and connection technology (packaging) would be either not possible or only incomplete without the application of laser technology. In numerous fields of microelectronics and micro material processing, especially UV-lasers have proved to be useful tools. More and more application fields are opened-up. UVlasers for via drilling, for laser direct imaging and flex routing are on the cutting edge of technology [1,2,3,4].   State-of-the-art polymer stencils for fine pitch applications are a new application field for the use of UV-lasers. Wafer bump stencils for the Flip Chip on Board (FCOB) assembly are a prime examples of where this new technology can be applied. Following are the advantages of this technology in combination with the use of laser-cut polymer stencils are shown.},
   Keywords	= {EKRA, 2D - 2 1/2 D inspection},
   Year 	= {2002} }


% 198) Record # 209
@misc{,
   Author	= {Hitachi Ltd.},
   Title 	= {Surface Mount Package, User’s Manual},
   Publisher	= {HTTP},
   Volume	= {2002},
   Number	= {May 25},
   Month	= {3/15/02},
   Abstract	= {Types of Package Mounting ConfigurationsSurface Mount Package Assembly Process FlowOverview of the Individual Steps in the Assembly ProcessExamples of BGA Assembly Evaluations},
   Keywords	= {Great SMT Graphics},
   Year 	= {2002} }


% 199) Record # 208
@misc{,
   Author	= {Tyco International Ltd.},
   Title 	= {Patented 2 1/2 D post print inspection system},
   Publisher	= {HTTP},
   Volume	= {2002},
   Number	= {May 25},
   Abstract	= {Tyco Electronics brings to you:EKRA Stencil PrintersTyco Electronics is now supplying EKRA Stencil Printers with our full line of SMT, APT, Press Fit Presses, Reflow Ovens, Depaneling Equipment and PCB Handling Equipment. EKRA is a leading worldwide supplier in providing stencil printing equipment for the electronics industry. Throughout its 50 year history, EKRA has been at the leading edge of the development of printing technology for the SMT, Semiconductor, and Hybrid markets. EKRA has a tradition of innovation with a focus on the development of "Useful Technology". This concept delivers products that have a balance of efficiency, reliability, and quality. The overall simplicity of design of all EKRA products minimizes failures that result from unnecessary complexity, yet maintains the highest reliability and overall capability.EVA Vision-SystemThe patented EVAä Vision System utilizes two high-resolution CCD cameras and is mounted on an X/Y gantry with linear glass encoders (1-micron resolution). This allows for guaranteed alignment accuracy and repeatability. EKRA’s unique programmable dual source lighting technology is impervious to varying contrasts. The intensity of the illumination can be adjusted for all types of substrates. Also, the use of light sources with different intensities makes it possible to detect fiducials with very low contrast (for example on ceramic hybrids, wafers, or LCDs.)EKRA 21/2D Inspection System The patented 21/2Dä inspection system from EKRA can significantly reduce the overall defect rate in production processes. The system has the ability to measure paste coverage, detect bridging, and to detect clogging in stencil openings.Programmable DispenserThis intelligent dispenser for solder paste and adhesive material utilizes software- control of the dispense speed and interval parameters. The dispenser uses 600-g or 1200-g cartridges and features complete sealing of the cartridge with a Kulissen-lock while in the park position. An alarm notifies the operator when the cartridge is empty.Automatic Stencil WiperThe optional automatic stencil wiper cleans the underside of the stencil reliably and effectively. Cleaning frequency is programmable reducing the need for manual intervention by the operator. The wiper can be programmed for a variety of dry- or wet-vacuum combinations, and can therefore, be tailored to suit any product or process.},
   Keywords	= {EKRA, 2D - 2 1/2 D inspection},
   Year 	= {2002} }


% 200) Record # 207
@misc{,
   Author	= {Texas Instruments Inc.},
   Title 	= {Semiconductor Packaging Information by Pitch},
   Publisher	= {HTTP},
   Volume	= {2002},
   Number	= {May 25},
   Year 	= {2002} }


% 201) Record # 206
@misc{,
   Author	= {Texas Instruments Inc.},
   Title 	= {Semiconductor Packaging Information by Type},
   Publisher	= {HTTP},
   Volume	= {2002},
   Number	= {May 25},
   Year 	= {2002} }


% 202) Record # 205
@phdthesis{,
   Author	= {Ugur, Hakan Alexander},
   Title 	= {Intelligent modeling and control of the solder paste print process for surface mount PCB assembly},
   School	= {State University of New York at Binghamton},
   Type 	= {Ph.D.},
   Abstract	= {Surface mount technology (SMT), used in the assembly of printed circuit boards, is now a mature technology. The advantages of SMT over the conventional assembly techniques, such as through-hole technology have been continuously realized. Nevertheless, the demand for smaller products and higher speed circuitry continue to drive the design of Surface Mount Components (SMC), to higher pin counts and reduced package size. Increased density at the chip level allows higher performance and power to be compressed into smaller and tighter packaging systems. However, as the drive to shrink electronics packaging systems continues, industry faces an ever increasing number of challenges, in the design of materials, processes, and models. The solder paste screen printing process is a critical aspect of SMT. It is one of the major processes used in the assembly of SMC. This process is sensitive to stencil, solder paste, environmental, and machine related variables. The highly complex inter-relationship between these variables makes the selection, of proper parameters for the print process, crucial. Therefore, expert systems are implemented to insure proper parameterization. The present research introduces the Intelligent Print Process Control System (IPPCS). This system models the print process with an acceptable level of accuracy and generalization, such that proper control may be implemented in a variety of SMT print applications, under a set of predetermined conditions. Various modeling and control techniques are incorporated into the IPPCS. Based upon empirical data, the IPPCS is a superior methodology, which achieves its set objectives.},
   Keywords	= {ENGINEERING, SYSTEM SCIENCE (0790), ENGINEERING, INDUSTRIAL (0546), ENGINEERING, ELECTRONICS AND ELECTRICAL (0544)},
   Year 	= {1996} }


% 203) Record # 204
@article{,
   Author	= {Berntson, Ross B. and Whitmore, Mark},
   Title 	= {Expanding the printing process window},
   Journal	= {SMT Surface Mount Technology Magazine},
   Volume	= {13},
   Number	= {4},
   Pages	= {5},
   Abstract	= {A method of assessing the stencil-printing process is described to determine the causes of common failures. The method evaluates if a chamber-printing solder paste application system could widen the printing process window. If the printing process does not dictate rheology, thixotropy, viscosity, metal load, tack and open time, these characteristics can be specified to address other aspects of the SMT process.},
   Keywords	= {Screen printing, Soldering, Soldering alloys, Printed circuit, boards, Printed circuit manufacture, Printed circuit testing,, Rheology, Viscosity, Deposition, Electronics packaging, Chamber-printing solder paste application systems, Thixotropy,, Ball grid arrays (BGA), S 714.2 Semiconductor Devices and Integrated Circuits, S 745.1, Printing, S 538.1.1 Soldering, S 931.1 Mechanics, S 631.1 Fluid, Flow (General), S 931.2 Physical Properties of Gases, Liquids and, Solids},
   Year 	= {1999} }


% 204) Record # 203
@article{,
   Author	= {Seto, Ping and Loew, Norbert and Muehlbauer, Andreas},
   Title 	= {Stencil cleaning},
   Journal	= {SMT Surface Mount Technology Magazine},
   Volume	= {15},
   Number	= {5},
   Pages	= {66-72},
   Abstract	= {DaimlerChrysler required a new cleaning agent to remove adhesives, solder pastes and flux residues from various substrates associated with an adhesive stencil printing process. The newly developed MPC cleaning agent VIGON SC 202 more than met the requirements laid out by DaimlerChrysler. It was compatible with cleaning all the adhesive candidates, the solder paste on both stencils and PCBs, and the flux residues on one-side populated PCBs.},
   Keywords	= {Stainless steel, Agents, Printed circuit boards, Surface cleaning,, Printed circuit manufacture, Adhesive pastes, Fluxes, Quality, control, Automatic stencil cleaning, Stainless steel stencils, Solder paste, S 714.2 Semiconductor Devices and Integrated Circuits, S 545.3, Steel, S 803 Chemical Agents, S 802.3 Chemical Operations, S 913.3, Quality Assurance and Control},
   Year 	= {2001} }


% 205) Record # 202
@article{,
   Author	= {Bixenman, Mike and Pitarys, Charlie},
   Title 	= {Cleaning guidelines for fine-pitch stencil applications},
   Journal	= {SMT Surface Mount Technology Magazine},
   Volume	= {15},
   Number	= {6},
   Pages	= {52-60},
   Abstract	= {Stencil cleaning has taken an increasingly important role in surface mount and through-hole technology. Clean stencils are key in delivering correct volumes of material to the printed circuit board (PCB) pads. Assemblers prefer to have one cleaning method suitable for removing both solder paste and adhesive.},
   Keywords	= {Precision engineering, Printed circuit boards, Process, engineering, Assembly, Reliability, Vacuum applications, Etching,, Chemical finishing, Silicon wafers, Aspect ratio, Stencil cleaning, Fine pitch technology, Programmable vacuum, systems, S 714.2 Semiconductor Devices and Integrated Circuits, S 913.1, Production Engineering, S 633.1 Vacuum Applications, S 802.3, Chemical Operations, S 744.9 Laser Applications},
   Year 	= {2001} }


% 206) Record # 201
@article{,
   Author	= {Mullins, Brian},
   Title 	= {Assembling fine line surface mount PCBs},
   Journal	= {Electronic Packaging and Production},
   Volume	= {37},
   Number	= {3},
   Pages	= {2},
   Abstract	= {High-density PCBs complicate nearly every stage of the assembly operation. From handling the incoming components through rework, assemblers must compensate for smaller components spaced closer together. This paper presents some of the process concerns contract manufacturers share when assembling these high-density PCBs. It is shown that a high-density PCB not only requires fine pitch devices but also fine line on the board. As with the components, care must be taken with the board through the assembly process.},
   Keywords	= {Assembly, Surface mount technology, Printed circuit boards,, Electronics industry, Printed circuit design, Electronics, packaging, Integrated circuits, Microelectronic processing,, Consumer electronics, Soldering, Etching, Laser beam cutting, Solder paste printing, Stencil manufacturing, Chip scale, packaging, Flip chip attachment, Chemical etching, S 714.2 Semiconductor Devices and Integrated Circuits, S 715, Electronic Equipment, General Purpose and Industrial, S 913.4, Manufacturing, S 913.1 Production Engineering, S 538.1.1, Soldering, E 714.2 Semiconductor Devices and Integrated Circuits,, E 715 Electronic Equipment, General Purpose and Industrial, E, 913.4 Manufacturing, E 913.1 Production Engineering, E 538.1.1, Soldering},
   Year 	= {1997} }


% 207) Record # 200
@inproceedings{Mahajan96,
   Author	= {Mahajan, Roop L.},
   Title 	= {Statistical neural network modeling for stencil printing},
   BookTitle	= {Surface Mount International},
   Abstract	= {Stencil printing is the first and perhaps the most critical step affecting the quality and yield of a fine pitch surface mount assembly. This process must be optimized for higher assembly yield. In this paper, a statistical design of experiment (DOE)-based neural network approach is presented that serves to economically model the process. It is shown that a neural network model based on a Taguchi L27 orthogonal array does an excellent job of determining the optimum settings for minimum solder paste height variation. The effect of optimum settings on the fatigue life of solder joints is presented. Finally, techniques are proposed to transfer a neural network process model from one machine to another without the need for extensive experimental data.},
   Keywords	= {defects related SPP},
   Year 	= {1996} }


% 208) Record # 199
@inproceedings{Ramkumar00,
   Author	= {Ramkumar, S. Manian and Lemery, Jason},
   Title 	= {High speed stencil printing of solder paste a DOE full factorial experiment},
   BookTitle	= {SMTA International},
   Address	= {Maui, Hawaii},
   Abstract	= {This paper is aimed at presenting the results of a full factorial DOE on High Speed Stencil Printing of Solder Paste. The experiment was funded by the TRW Foundation and was conducted at RIT’s Center for Electronics Manufacturing. The various factors that were toggled as part of the experimental design were stencil construction, stencil thickness, paste formulation, and print speed. The levels for these factors included: two stencil constructions, two stencil thicknesses, two no-clean paste formulations, and two print speeds. The response that will be used in the analysis is print volume. In order to analyze the print characteristics for a wide range of component pitches, test boards were designed to accommodate 50, 20 and 16 mil pitch components. The experiment will be conducted for various combinations of factors and levels to obtain a valid full factorial experiment and the measured responses will be analyzed using MiniTAB software. The analysis is expected to provide information pertaining to the most influential factors. The experiment details, test board design and results are presented in detail in this paper.The analysis technique would involve the plotting of a Half Normal and Pareto chart, to identify the most influential factors. Mean solder paste volume, with respect to each of the levels of the factor, will also be plotted, in order to determine the nature of influence of the factors at various levels. Interaction plots would be plotted to analyze the combined effects of the different factors and levels. The analysis would also include the development of a prediction equation using regression analysis techniques and the determination of optimum setpoints for obtaining the required solder paste volume. Since the experiment is still underway we are not able to provide the actual analysis results in the paper. The results will be presented in detail at the conference.      This experiment will enable us to identify the factors and setpoints that will provide good process capability for the three different pitches being studied. Even though all of the process variables have not been included in this experiment, it will still provide a good understanding of the high-speed stencil printing process. Once optimum setpoints are determined, this experiment can be taken to a more elaborate level, by keeping those setpoints as constant parameters and including new factors.},
   Year 	= {2000} }


% 209) Record # 198
@inproceedings{Ramkumar01,
   Author	= {Ramkumar, S. Manian and Clouthier, Richard and Ghaffarian, Reza},
   Title 	= {Print process characterization for BGA, fine pitch BGA and CSP components},
   BookTitle	= {SMTA International},
   Address	= {Chicago, IL},
   Abstract	= {The goal of this characterization study is to conduct a formal design of experiment, to understand the impact of three important print process parameters, along with BGA, CSP pitch and I/O density on solder paste print quality and volume. The primary objective is to determine an optimum stencil print process for mixed technology PWB, containing various BGA, Fine Pitch BGA (FPBGA) and CSP components, ranging in pitch from 0.5 to 1.27 mm and I/Os from 48 to 784. The experiment was carried out using OSP coated test vehicles, provided by JPL, containing a myriad of BGA and CSP components. No Clean paste was selected for this study, with Type III and Type IV particle size and viscosity ranging from 900-1000 Kcps. Other parameters for the experiment included: Stencil Type - E-Fab Stencil Thickness - 5.65 and 4.65 mils Print Mechanism - Metal Blade 45 degree angle Print Speed - 2 mm/sec Print Pressure - Optimum setting to achieve good rolling of paste in front of the squeegee As part of the experiment, RIT conducted both qualitative and quantitative analysis. The qualitative analysis included visual examination of the actual bricks of paste deposited and recording any anomalies observed. The quantitative analysis involved the measurement of true 3D volume and height of solder paste print. This paper will present the findings of this study in detail.The analysis carried out at RIT indicates that the area aspect ratio plays a very important role in the paste printing process for mixed technology boards, containing various BGA, FPBGA and CSP devices. Other parameters that are also important include solder particle size, stencil thickness, stencil type and print parameters. Figure 8 shows that consistent and acceptable % transfer can be obtained for most of the BGA, Fine Pitch BGA and CSP components on the board (>60% transfer). The one device that did not show good results was U12, which has the smallest aperture size and pitch (0.5mm) when compared to other components. This indicates that further investigation is necessary, utilizing stencils which are thinner than 4.65 mils and different Type IV pastes. The best transfer (>120%) was obtained for component U3, which is a TSOP (0.8mm pitch), with rectangular apertures. Aperture shape was not considered as part of this experiment but could be a considered as a factor in future experimentation. Component U5, which is a 0.25mm pitch flip chip, was not used in the analysis, because the print quality was observed to be consistently very poor for the given print parameters. The inspection system was also not equipped with the proper magnification to inspect such a small device. Further experimentation is currently being planned, to include additional factors such as No-Lead paste and a thinner stencil (<4.65mils).},
   Year 	= {2001} }


% 210) Record # 197
@inproceedings{,
   Author	= {Mukadam, Muffadal and Santos, Daryl and McLenaghan, James and Kerrick, Nathan},
   Title 	= {Evaluation and optimization of the speedline MPM closed-loop rheometric pump head},
   BookTitle	= {SMTA International},
   Address	= {Chicago, IL},
   Abstract	= {At this time stencil printing is the most common and conventional form of mass solder paste application in the printed circuit board assembly process. New advancements in stencil printing technology have produced alternatives such as the Speedline MPM Closed-Loop Rheometric Pump Head (Rheopump). Unlike conventional squeegee printing where solder paste is continuously exposed to the surrounding atmosphere, the Rheopump encapsulates the solder paste. This impedes solvent evaporation, which slows material degradation and reduces waste. This paper uses an experimental design approach to identify the key factors and the level of influence each of these factors has on the overall Rheopump stencil printing process. The significant factors are then optimized such that a wide variety of aperture sizes can be printed with maximum volume and minimum standard deviation across the board.It is always preferable to opt for a process with lower standard deviation because higher standard deviation essentially means more variability, which could lead to higher defect rates. In most cases higher volumes can be obtained by increasing the aperture sizes however getting a lower standard deviation is the key to any stable process. The study shows that for BGA aperture sizes up to 11 mils, the transfer efficiency is less than 60%. These aperture sizes would typically be used for fine pitch BGA packages (such as CSP or micro BGA). Due to a variety of other components on the board it may not be possible to vary stencil thickness or change solder paste type. Over-printing the apertures by 2 –3 mils or changing the stencil manufacturing technique are few of the alternatives used to obtain higher transfer efficiency. The importance of a solder paste with a wider operating range cannot be over emphasized. A paste that can work at higher pressure and lower PID settings would perform very well with the Rheopump. Further experiments with other solder pastes are planned for the future.},
   Keywords	= {BGA, CSP, rheopump, design of experiments, transfer efficiency.},
   Year 	= {2001} }


% 211) Record # 196
@inproceedings{,
   Author	= {Coleman, William E.},
   Title 	= {Stencil print performance studies},
   BookTitle	= {SMTA International},
   Address	= {Chicago, IL},
   Abstract	= {Print performance of Electroformed and Laser-Cut stencils are studied over a wide range of aperture sizes. Relative paste volume, dispersion of paste volume, paste height, and dispersion of paste height are the measurables used to judge the stencil print performance. A new evaluation tool "PAR slope" (the slope of the curve obtained for a scatter plot of relative paste volume vs. Print Area Ratio) is also used to judge the stencil print performance. Results of this test show that Electroformed stencils provide acceptable solder paste bricks for Print Area Ratios down to as low as .5, much lower that the normally guideline of .65. This is a significant result for applications like 16 mil pitch QFP’s, uBGA’s, and Flip Chip’s. A stencil technology selection guideline based on Print Area Ratios and SMD component types is proposed.The typical evaluation to measure stencil performance has been to look at % paste release and/or the dispersion of solder paste volume for specific components / aperture sizes. This study looks at variety of responses over a wide range of aperture sizes. It deals with issues like how consistent is the % paste release and the paste height over a broad range of Print Area Ratios; what is the average relative paste volume over a range of Print Area Ratios; what is the standard deviation of the relative solder paste volume and solder paste height over a range Print area Ratios. From the data and corresponding responses a stencil ranking system is developed for the four stencil types tested. A stencil technology selection design guideline is proposed based on specific aperture designs / stencil thickness. The study indicates that under a fixed set of process / equipment conditions E-FAB stencils provide acceptable print performance down to a Print Area Ratio of .5.},
   Keywords	= {stencil, print area ratio, solder volume, PCB, laser, and electroformed.},
   Year 	= {2001} }


% 212) Record # 195
@inproceedings{Painaik01,
   Author	= {Painaik, Mandar and Santos, Daryl L. and McLenaghan, A. James},
   Title 	= {Guidelines for fine feature stencil printing},
   BookTitle	= {SMTA International},
   Address	= {Chicago, IL},
   Abstract	= {Recent technology advances and the evolution of components such as flip chips, chip scale packages, 0201s, and fine pitch leaded devices, have presented process challenges for most electronics manufacturers. The focus of this paper addresses the issues relative to fine feature component stencil printing on Printed Wiring Boards (PWBs). The paper discusses the stencil design, optimization of stencil printing and stencil wipe frequency for 0201 and CSP/micro-Ball Grid Array components. The fine feature stencil printing process is quantified for repeatable, efficient manufacturing in high volume production.Today, CSPs and 0201 devices are assembled in portable electronic products. These products are subject to harsh conditions during their service life and reliability is a concern. CSPs and 0201 components must reside on boards with other non-fine pitch devices. Therefore, the ability to deposit solder not only for CSPs and 0201s but also for SMT components is still a necessity. Printingrelated defects are common for these components due to area ratio violations. It is common because the transfer efficiency for CSPs is less that 60%. Overprinting is one solution, but it can lead to bridging and solder balling. Proper stencil design can help improve the transfer efficiency and increase the consistency of the process without over-sizing of the apertures. The stencil design parameters, apart from size, that need careful consideration are aperture shape, taper and electropolish. It can be seen from the above results that medium taper and high polish work the best for CSP and 0201 applications. Also, for CSP applications, it is recommended to use a square aperture for higher volume transfer.},
   Keywords	= {BGA, CSP, 0201, stencil design.},
   Year 	= {2001} }


% 213) Record # 194
@inproceedings{,
   Author	= {Tonapi, Sandeep and Srihari, K.},
   Title 	= {Process 'optimization' using designed experiments in an EMS provider's facility},
   BookTitle	= {SMTA Pan Pacific Microelectronics Symposium},
   Address	= {Maui, Hawaii},
   Volume	= {13-2},
   Abstract	= {The trend in the electronics packaging industry towards product miniaturization has resulted in the decrease in component density and the number of leads (bumps) per package along with a concurrent decrease in component lead (or bump) pitch. In addition, manufacturing process engineers have to cope with the need to maximize process yields and throughput while concurrently ensuring more than adequate solder joint reliability. The move towards the increased use of Electronics Manufacturing Service (EMS) providers is a result of the need to increase assembly efficiency and decrease processing costs. However, the increase in outsourcing has enhanced the need for systematic process 'optimization'. This paper discusses the use of designed experiments (both classical and Taguchi) to identify the process window and the 'optimum' print parameters for the stencil printing process. The use of classical as well as Taguchi methods for stencil printing of fine (20 mils) and ultrafine pitch (12 mils) SMCs is discussed. Stencil printing is also used for solder paste deposition for mixed technology assemblies where the Through Hole Components (THCs) are reflow soldered in conjunction with the Surface Mount Components (SMCs) in a single reflow pass. For these assemblies, depositing the required volume of paste at the through hole locations and achieving the desired holefill is as critical as depositing adequate paste at the surface mount locations. The use of designed experiments for these applications is also presented. Statistical analysis and response surface methodology is used to determine the optimum conditions.},
   Keywords	= {design of experiments, surface mount technology, printed circuit boards.},
   Year 	= {2000} }


% 214) Record # 192
@inproceedings{,
   Author	= {Brathwaite, Nicholas E.},
   Title 	= {EMS providers must take the technology lead},
   BookTitle	= {Surface Mount International},
   Address	= {San Jose, CA},
   Abstract	= {Many have asked “should electronic manufacturing service (EMS) providers drive the implementation and application of new technologies or should the technology capabilities of EMS providers reflect their customer’s desires?” This paper suggests that the two parts of this question are not mutually exclusive but may well be mutually inclusive. According to Integrated Circuits Engineering (ICE) the semiconductor content in electronics is expected to grow from approximately 16% in 1995 to over 22% by the year 2000. This means that the packaging technologies used for semiconductors will continue to significantly impact the printed circuit board assembly (PCBA) operations of EMS providers. Even more interesting, Frost and Sullivan reports that over the last few years, the packaging industry has left the semiconductor industry in the dust technologically by introducing several new types of packages, all vying to be the package for the next wave of integrated circuits (ICs).Technological development or adoption, on the part of the OEM or EMS provider must be viewed as part of a greater system which encompasses other factors in this business model. It is the responsibility of all parties involved to constantly push the envelope and develop a greater understanding of newer technologies and how they relate to their own products and services. The OEM has the intrinsic responsibility to monitor its own market and develop new products able to compete and succeed in the marketplace. This process should be a core competency. At the same time, EMS providers must develop, in advance, engineering capabilities and a technological roadmap able to meet the requirements of these next generation products. Together, both parties    create a partnership where the lines of distinction become blurred.},
   Year 	= {1998} }


% 215) Record # 191
@inproceedings{Beair01,
   Author	= {Beair, Bill},
   Title 	= {Real time statistical process control of the screen print process},
   BookTitle	= {SMTA International},
   Abstract	= {Increased component density found on today's printed circuit boards (PCBs), coupled with faster assembly cycle time requirements and the increased cost of screen print defects, necessitate continuous process monitoring of manufacturing operations. Paste rheology, board warp, aperture size and many other assembly features drive the need for continuous monitoring of solder deposition volume. Current screen print equipment offers 2D and 3D paste inspection capability, but fails to archive the inspection data to permit continuous monitoring of solder volume. Access to historical data, trend analysis, and data set comparisons facilitates process monitoring. This paper provides an insight into continuous monitoring and the positive effects it can produce in the electronics market. Defining the Paste Deposition Process Window There are many factors that come into play when defining solder volume control limits. To determine the control limits the minimum and maximum solder volume must be determined. Factors to consider when evaluating solder volume include plating on the circuit card, plating on the component leads and the component lead and circuit card pad dimensions. The online IPC-SM-782-Land Pattern Calculator (www.ipc.org/html/fsresources.htm) is a good tool to establish initial control limits. The control limits can then be compared to the theoretical print volume calculated from the stencil apertures. Stencil apertures aspect ratios will change the mean of the volume printed.},
   Year 	= {2001} }


% 216) Record # 190
@inproceedings{Alawani01,
   Author	= {Alawani, Ashish D. and Srihari, K. and DiLella, Jude},
   Title 	= {Developing a robust stencil printing process for diverse interconnection technologies},
   BookTitle	= {Pan Pacific Symposium},
   Address	= {Kauai, Hawaii},
   Abstract	= {The area array assembly process is extremely complicated due to the large number of material, equipment and process parameters involved. The intricacy has been enhanced by the increasing trend towards finer pitches and higher interconnects. The complexity of solder paste deposition increases with decrease in component pitch. The need for high assembly yields and product reliability, and the difficulties associated with rework have made tighter process control quite essential during area array assembly. That is why solder paste printing has become one of the most critical processes in area array assembly. There is not a single rule for stencil design and printing for area array packages. Due to the geometry and reliability differences, the level and nature of control is different for each of the different component types. Hence, developing a process for a variety of components together is a challenging task. In the present research effort, the no-clean stencil printing process was studied and characterized for diverse, advanced surface mount packages including large Input/Output (I/O) Plastic Ball Grid Arrays (PBGAs), Ceramic Ball Grid Arrays (CBGAs) Chip Scale Ball Grid Array (CSBGA) and a Micro BGA (?BGA). Additionally, printing was characterized for a Through-Hole Component (THC), which was to be reflow-soldered along with the area array components. The challenge was to identify a single stencil thickness and paste type for a diverse range of solder volumes with approximately 130,000 cubic mils of solder paste for the THC (with adequate hole-fill) at one extreme and at least 650 cubic mils for the ?BGA at the other. The approach used was to first find the optimal combinations for the sub-systems and then modify these combinations using mature consideration and calculated guesses to identify sub-optimal, but the most practical parameters for the entire system. Multiple experiments were carried out using a Design of Experiments (DOE) based approach. Three different stencil thickness and two paste types were studied to identify the optimal materials for the overall system. The initial experiment identified that solder volumes as low as for the ?BGA can be deposited successfully using a Type III paste, provided the appropriate area ratios are maintained. This can be achieved by controlling the ratio between the aperture feature size and stencil thickness. The optimal thickness for the diverse range of components on the test vehicle used for the present research was identified to be 6 mils. Three different aperture shapes, namely, circular, oval and square with rounded corners were evaluated for paste transfer and in every single case circular apertures performed the best. Adequate hole-fill could not be achieved for the THC by using a polyurethane squeegee. Hence, further experiments were conducted to establish a comparison between the print performances of a metal and a polyurethane squeegee. It was observed that the use of a metal squeegee increased the solder paste deposition at the area array sites by at least 20 - 30 % and resulted in a radical improvement in hole-fill (from 50 % previously) to 70 %. Comprehensive statistical analysis was performed to establish these findings. In summary, this paper comprehensively documents the various aspects involved in the development of a robust stencil printing process for a variety of interconnection technologies.},
   Keywords	= {Design of Experiments, Surface Mount Technology, Printed Circuit Boards.},
   Year 	= {2001} }


% 217) Record # 189
@inproceedings{,
   Author	= {Kamen, Edward W. and Goldstein, Alex and Asarangchai, Orapin and Fraser, Allan and Klatka, Kyle and Belmonte, Joe and Huber, Robert},
   Title 	= {Analysis of Factors that Affect Yield in SMT Assembly},
   BookTitle	= {NEPCON West},
   Address	= {Anaheim, CA},
   Abstract	= {In many SMT production lines in operation today there is a substantial amount of data collection on yield and on the performance of the equipment in the line. Although a great deal of data is available, there is a lack of effective techniques for processing the data to determine the operational status of the equipment, or to be able to carry out predictive maintenance. Standard SPC charts represent the state-ofthe- art in industry. However, the data collected from a standard SMT process is typically very noisy due to the natural variability of the SMT process itself, as well as the inherent measurement errors of the process monitoring equipment. To compound the problem, the relationships between all the various process variables and yield are unclear. An on-going research effort at Georgia Tech is focused on the development of a novel probabilistic-based approach to the analysis of various factors that affect quality and yield in surface mount assembly lines. Our goal is to develop a robust methodology for detecting and identifying emerging problems in SMT assembly line operations with a view to being able to identify and ultimately correct those problems before they adversely affect production. The specific goal of the first phase of the research is to be able to determine appropriate operating ranges for the equipment in an SMT line, and to be able to use board-to-board measurements of solder print quality, placement accuracy, and yield after reflow to determine the operational status of that equipment.We emphasize that the results discussed in this paper are very preliminary, especially given the relatively small sample size (i.e., the number of components placed). Due to the limited sample size, we did not attempt to compute defects in terms of parts per million (PPM), which is the standard unit used in industry. We also did not use measurements of the solder paste height, area, or volume after stencil printing, or measurements of offsets after component placement. We will use these measurements for the additional board runs that we have planned. The additional board runs should give us an adequate sample size, so that we should have reasonable confidence levels for the data. In addition to varying offsets in the placement machines, we have developed a design of experiments for varying other equipment parameters such as z-axis placement force, stencil printer parameters such as squeegee pressure and print speed, and reflow oven parameters such as conveyor speed and temperatures in the various zones. Using the data obtained from these runs, we expect to be able to determine a priori probabilities for solder print quality, placement accuracy, and yield given that the equipment is in the various possible fault states. These conditional probabilities can then be used with board-to-board measurement data to determine the states of the equipment during line operation. We expect to be able to present results on this at the conference.},
   Year 	= {1999} }


% 218) Record # 188
@inproceedings{Venka97,
   Author	= {Venkateswaran, S. and Srihari, K. and Adriance, J.H. and Westby, G.R.},
   Title 	= {A realtime process control system for solder paste stencil printing},
   BookTitle	= {Electronics Manufacturing Technology Symposium, 1997., Twenty-First IEEE/CPMT International},
   Address	= {Dept. of Syst. Sci. & Ind. Eng., State Univ. of New York, Binghamton, NY, USA},
   Pages	= {62-67},
   Abstract	= {The goal of stencil printing solder paste in surface mount printed circuit board (PCB) assembly is to apply an accurate and repeatable volume of solder paste at precise locations. The causes for a substantial proportion of the problems associated with PCB assembly can be traced back to the solder paste printing process. Control of the stencil printing process has become significantly more important over the years due to the introduction of ultra fine pitch technologies. Three important issues have to be considered in the stencil printing process to obtain a good yield. They are: (i) setting up the process in an efficient way, (ii) monitoring and controlling the process when necessary and (iii) troubleshooting the process when a defect occurs. This research focused on the design and development of software systems that could perform the above-mentioned functions. Three systems were developed in the research discussed in this paper. They are the process advisor, the intelligent control system (or the ICS) and the diagnosis system. The process advisor (the first system) provides for the setup of the stencil printing process. It helps the user to set up a new as well as an existing application. The process advisor also helps the user in estimating the volume of solder paste that would be deposited for a given stencil thickness and aperture dimensions. The ICS (the second system) was developed to control the stencil printing process in real-time. The diagnosis system (the third system) is used to troubleshoot the process, if needed.},
   Keywords	= {soldering, fine-pitch technology, process control, printed circuit manufacture, real-time systems, assembling, surface mount technology, printing, monitoring, intelligent control, electronic engineering computing, realtime process control system, solder paste stencil printing, SMT printed circuit board assembly, surface mount PCB assembly, fine pitch technologies, monitoring, software systems, process advisor, intelligent control system, diagnosis system, solder paste volume estimation, process troubleshooting, precise repeatable pads, fuzzy logic},
   Year 	= {1997} }


% 219) Record # 187
@article{,
   Author	= {Kamen, Edward W. and Goldstein, Alex and Sahinci, Erin},
   Title 	= {Monitoring Surface-Mount Component Placement},
   Journal	= {Circuits Assembly},
   Number	= {January},
   Pages	= {42-49},
   Month	= {January},
   Year 	= {1999} }


% 220) Record # 186
@inproceedings{Kumar91,
   Author	= {Kumar, S.},
   Title 	= {Survey of various statistical process control methods},
   BookTitle	= {Electronics Manufacturing Technology Symposium, 1991., Eleventh IEEE/CHMT International},
   Address	= {Motorola Inc., Austin, TX, USA},
   Pages	= {387-390},
   Abstract	= {The author discusses the various statistical process control (SPC) techniques currently being used by different industries. He also introduces a few nonconventional SPC charts which were published recently and could be used for better results. He also describes the Motorola method of performing characterization of processes.},
   Keywords	= {statistical process control methods, SPC charts, Motorola method, characterization, statistical process control, DOE},
   Year 	= {1991} }


% 221) Record # 185
@article{Johnson97,
   Author	= {Johnson, Alden},
   Title 	= {Optimizing stencil printing for fine-pitch circuit boards},
   Journal	= {Electronics Engineer},
   Number	= {December},
   Month	= {December},
   Abstract	= {View printing of fine-pitch PCBs as a complete process - a combination of substrate, stencil, paste, and paste-deposition equipment. Following general guidelines will help you devise a system suited to your production environment.},
   Keywords	= {General Recomendations},
   Year 	= {1997} }


% 222) Record # 184
@article{,
   Author	= {Clark, David},
   Title 	= {Sampling vs. 100% Inspection},
   Journal	= {Circuits Assembly},
   Number	= {March},
   Pages	= {56-59},
   Month	= {March},
   Year 	= {1998} }


% 223) Record # 183
@article{Husman93,
   Author	= {Husman, M. S. and Rukavina, J. P. and Yuan, Guo},
   Title 	= {A study of solder paste volumes for screen printing},
   Journal	= {Proceedings of the Technical Program. NEPCON West'93},
   Abstract	= {Solder paste deposition is a very important factor in the surface mount assembly process. It is well known that an accurate and consistent volume of solder paste is the key to low-defect reflow soldering. This paper describes an investigation of the effect of aperture direction on solder paste volumes and their variations. The study considered two squeegee materials, a 90 durometer rubber squeegee and a metal squeegee, as well as two different component lead pitches, 25 mil and 50 mil. The purpose of this study is threefold. (i) To compare solder paste volumes deposited in aperture directions parallel to and perpendicular to the print direction. If a significant volume difference is noted, stencil design guidelines should reflect this. From the authors' experience, the size and shape of apertures for a four-sized symmetrical component are the same in both the horizontal and vertical directions. (ii) To examine the consistency of solder paste depositions in both aperture directions. If strong statistical evidence suggests that solder paste volumes are more consistent on one aperture direction than the other, design engineers may find this information useful for printed circuit board layout. (iii) To compare the results of (i) and (ii) for two different squeegee materials. This will be useful for squeegee material selection},
   Keywords	= {assembling. circuit layout. printed circuit design., printed circuit manufacture. soldering. surface mount, technology, Volume: Single best predictor},
   Year 	= {1993} }


% 224) Record # 182
@article{,
   Author	= {Curtin, M.},
   Title 	= {The black art of fine-pitch printing},
   Journal	= {Proceedings of the Technical Program. NEPCON West'93},
   Abstract	= {Fine-pitch production today requires that solder patterns not vary by more than 0.5 mil, and future ultra-fine-pitch assemblies will shrink even this tight tolerance down by 30-50%. Current concerns with the ability to print and assemble fine-pitch SMT will be exacerbated by the need to print fine-pitch in large volumes. Zero defect manufacturing is a concern to both large and small electronics operations. Concern with zero defects in turn leads to concern for manufacturing repeatability, a particular problem with fine-pitch printing. Solder paste screening today accounts for 64% of all SMT defects. Careful manufacturers concerned with fine-pitch need to consider their printing operations and to review three sets of concerns: adequacy of their printing equipment; the design and condition of their stencils; and solder paste compositions},
   Keywords	= {assembling. printed circuit manufacture. soldering., surface mount technology, defects related SPP},
   Year 	= {1993} }


% 225) Record # 181
@article{,
   Author	= {Sahay, C. and Head, L. M. and Shereen, R. and Dujari, P. and Constable, J. H. and Westby, G.},
   Title 	= {Study of print release process in solder paste printing},
   Journal	= {Transactions of the ASME. Journal of Electronic Packaging},
   Volume	= {117},
   Number	= {3},
   Pages	= {230-4},
   Abstract	= {This study presents results from experiments on printing with apertures having circular, rectangular, square and triangular geometries. The ratio of the printed volume to the aperture volume has been used as a definition of print quality. It was observed that acceptable prints were obtained when the ratio of aperture area to the aperture wall area was more than 0.8. A simple analytical model is also presented for the release of solder paste as the stencil separates from the substrate board assuming that the apertures were filled. The solder is currently treated as a single phase material with Newtonian behavior. The motion of solder paste in the stencil aperture is modelled as the developing viscous flow with velocity boundary layers developing along the walls. The shear strength of the paste is used to determine the area sticking to the wall, thus making it possible to get an estimate of the print quality. The model incorporates the effect of paste properties like viscosity, density, tack and shear strength, and other process variables like aperture dimensions and separation (lift off) velocities between the stencil and the board in predicting the print quality. The model predicts the effect of shear to tack strength of the paste, stencil thickness, and the ratio of aperture to wall area ratio on print quality},
   Keywords	= {printed circuit manufacture. reflow soldering. surface, mount technology},
   Year 	= {1995} }


% 226) Record # 179
@article{Chung94,
   Author	= {Chung, C. W. and Srihari, K. and Adriance, J. H. and Westby, G. R.},
   Title 	= {Closed loop process control for solder paste stencil printing},
   Journal	= {Surface Mount International Conference and Exposition. Proceedings of the Technical Program},
   Abstract	= {The deposition of solder paste in the proper amount and in the right place strongly influences process yields in the surface mount assembly of printed circuit boards (PCBs). The move towards fine and ultra-fine pitch surface mount components (SMCs) has increased the importance of the solder paste printing process. A prototype real time closed-loop process control system was designed and developed in this research to monitor the solder paste stencil printing process for the assembly of surface mount PCBs. This decision support process control system achieves `optimal' print conditions through an iterative approach that was both proactive and reactive in nature},
   Keywords	= {assembling. closed loop systems. fine-pitch technology., iterative methods. printed circuit manufacture. printed, circuit testing. process control. soldering. surface mount, technology},
   Year 	= {1994} }


% 227) Record # 178
@article{Gopala98,
   Author	= {Gopalakrishnan, L.},
   Title 	= {Continuous improvement of the solder paste deposition process through designed experiments},
   Journal	= {IPC/SMTA Electronics Assembly Expo. Proceedings of the Technical Program},
   Abstract	= {Several researchers have concluded that the solder paste deposition process has the most significant impact on SMT process yields and product reliability. The objective of this research was to evaluate the parameters affecting solder paste stencil printing and to develop a fundamental understanding of the complex interactions among them, especially in a contract assembly environment. Multiple experiments were carried out using a design of experiments approach. The components considered varied from 12 mil pitch peripheral leaded devices to large input/output BGAs. A Taguchi-based experimental methodology was used to screen the parameters that significantly influenced the stencil printing process. Factors considered in the screening experiments included solder paste type, squeegee material, stencil thickness, aperture size, print pressure, print speed, and separation speed. Full factorial experiments were then conducted to study the combined effect of the significant factors on the response variables. The volume of the solder paste deposits and the overall print quality were the response variables used. Comprehensive statistical analyses were performed, and optimal material and process parameters were identified. The response surface methodology was used to identify process windows for solder paste stencil printing. This process was further improved through the use of higher print speeds, ranging up to 7 in/s. Systematic experimentation was then carried out to test the limits of this technology for different solder paste formulations using both polyurethane and metal squeegees},
   Keywords	= {assembling. ball grid arrays. circuit reliability. design, of experiments. . integrated circuit packaging. printed, circuit design. printed circuit manufacture. . printed, circuit testing. soldering. surface mount technology., Taguchi methods, Volume: Single best predictor, response surface, process window},
   Year 	= {1998} }


% 228) Record # 177
@article{,
   Author	= {Riedlin, M. H. A. and Ekere, N. N.},
   Title 	= {Investigation of heat generation in the stencil printing of solder paste},
   Journal	= {IPC/SMTA Electronics Assembly Expo. Proceedings of the Technical Program},
   Abstract	= {Solder paste stencil printing is a critical stage in SMD reflow soldering. A high proportion of all SMA defects are related to the stencil printing process. This is likely to continue with the drive to further miniaturisation and the implementation of die-size devices. The challenge in stencil printing at such dimensions is in achieving repeatable solder paste deposition from print to print and pad to pad. To meet this challenge requires an understanding of the solder paste rheology characteristics throughout this process. One of the key factors which influences solder paste rheology is temperature. Any increase in temperature can cause the solder paste viscosity to decrease significantly, and vice versa. A solder paste temperature increase can be due to environmental conditions, or, more importantly, heat generation caused in the paste roll during stencil printing. In this paper, we present a process model for prediction of the solder paste temperature rise. The model was experimentally validated using a thermal imaging camera system. The temperature rise observed was in line with that predicted by the model. A typical temperature rise of 1 to 2 degrees C was observed during stencil printing. This temperature rise could adversely affect solder paste printing performance. To demonstrate the effect of temperature on the printing performance, controlled rheological tests were carried out to produce rheograms showing the effect of temperature on viscosity. Hence, there is a need to be able to control heat generation in the paste roll to ensure consistent solder paste deposits at flip chip dimensions},
   Keywords	= {assembling. circuit reliability. flip-chip devices., infrared imaging. integrated circuit packaging. printed, circuit manufacture. printed circuit testing. reflow, soldering. rheology. surface mount technology. thermal, analysis. viscosity},
   Year 	= {1998} }


% 229) Record # 176
@article{,
   Author	= {Belmonte, J.},
   Title 	= {Proofing the 45 degree printing process},
   Journal	= {Proceedings of the Technical Program. NEPCON West '97. Conference},
   Abstract	= {It has been recognized for some time that solder paste stencil printing might be optimized by printing with the squeegee oriented at a 45 degree angle. A simple analysis will suggest why this is the case. In 0 degree printing, the longitudinal axis of the stencil apertures are typically either at 0 (longitudinal) or 90 (transverse) degrees with respect to the squeegee direction. This situation creates two different mechanisms for printing. In transverse printing, failure mechanisms such as "scooping" can occur that will negatively affect the resultant bond in reflow. While in longitudinal printing mechanisms such as "pump" may cause problems. By varying the printing parameters one or the other can be eliminated, often at the expense of making the other worse. In 45 degree printing, both types of apertures experience the same attack angle, hence the same printing mechanism. Therefore, the print parameters can be optimized to produce similar printing quality in both types of apertures. Although in theory 45 degree printing is a winner, it has not clearly been demonstrated to be superior experimentally},
   Keywords	= {design of experiments. printed circuit manufacture., printing. reflow soldering. . surface mount technology},
   Year 	= {1997} }


% 230) Record # 175
@article{Gopala-Srihari98,
   Author	= {Gopalakrishnan, L. and Srihari, K.},
   Title 	= {Solder paste deposition through high speed stencil printing for a contract assembly environment},
   Journal	= {Journal of Electronics Manufacturing},
   Volume	= {8},
   Number	= {2},
   Pages	= {89-101},
   Abstract	= {Maximizing the throughput of an assembly line while concurrently ensuring good quality and high reliability is the primary focus of a contract printed circuit board assembly environment. Reduction of the cycle time associated with the assembly process, therefore, is of prime importance. The surface mount assembly steps include stencil printing, component placement and reflow soldering. Stencil printing is typically not the bottleneck in the assembly sequence. However, there are specific assemblies in which the stencil printing operation is the bottleneck. This research focused on reducing the cycle time associated with the stencil printing step by increasing the print speed. Designed experiments were carried out on commercially available solder pastes to investigate their ability to be stencil printed at high speeds (76 to 178 mm per second). A wide range of component types, including ball grid arrays and 0.3-mm (12 mil) pitch ultrafine pitch components, were studied. The heights of the solder paste deposits and the print definition obtained were the response variables considered. This study also determined the impact of various squeegee materials and powder sizes on solder paste deposition. It was observed that some newer commercially available solder paste formulations could be consistently and repeatably deposited at print speeds up to 178 mm (7 inches) per second},
   Keywords	= {assembling. printed circuit manufacture. reflow soldering., surface mount, precise repeatable pads},
   Year 	= {1998} }


% 231) Record # 174
@article{,
   Author	= {Whitmore, M.},
   Title 	= {Controlling the solder paste printing process},
   Journal	= {Electronic Packaging and Production},
   Volume	= {39},
   Number	= {1},
   Pages	= {32-4, 36, 38},
   Abstract	= {Fine pitch SMT assembly requires precise process control. During squeegee printing, paste transfer forces are influenced by different interactive parameters including print speed, pressure, squeegee angle, paste rheology and paste roll volume. Controlling these parameters so that the transfer forces remain identical from one print to the next is difficult. Significant variations in transfer forces can occur as the paste roll depletes, and with time as the solder paste rheology changes due to exposure to the atmosphere. Even on the same print, different transfer forces can be experienced along the edges of PCBs, where the paste roll volume on the stencil naturally tends to taper down. To address these issues a new solder paste print head has been designed. This enables a new solder paste printing process which is helping PCB assemblers achieve new levels of process control. Initial experiments have indicated many benefits to the system, including independent control of pressure and speed, which opens up the printing process window and assists in the high-speed printing of fine pitch devices},
   Keywords	= {assembling. fine-pitch technology. printed circuit, manufacture. process control. . soldering. surface mount, technology},
   Year 	= {1999} }


% 232) Record # 173
@article{Stevenson99,
   Author	= {Stevenson, J. V. and Drabenstadt, D.},
   Title 	= {Stencil printer optimization study},
   Journal	= {Surface Mount Technology},
   Volume	= {13},
   Number	= {11},
   Pages	= {58, 60, 62-3},
   Abstract	= {The solder paste printing process is perhaps the most critical operation for assembling a PCB populated with surface mounted components. Industry experts agree that solder defects are caused, in part, by poorly printed solder paste. As many as 60% of soldering defects can be traced to improper deposition. Therefore, accuracy and repeatability of the stencil printer is highly desirable throughout the entire printing process. There are many variables that can effect the formulation of a solder paste pad. Some industry experts suggest that there are a minimum of 39 process variables that must be controlled. By reducing the variation in the printed paste pad area, the opportunity exists for achieving a six-sigma process. To optimize the stencil printing process, the six-sigma philosophies of reducing process variation and targeting an average response were used to complete this task. The six-sigma tool, a mathematically sound statistical technique, was used to accomplish this undertaking. After mapping out the entire printing operation, a list of factors were generated for the semiautomatic printer and solder paste used for this experiment. The semiautomatic printer used on the line had a manual setting with a gauge for the print pressure setting. The solder was a high-metal-content, fine-pitch mesh paste},
   Keywords	= {assembling, circuit reliability, design of experiments, fine-pitch technology, optimisation, printed circuit manufacture, printed circuit testing, soldering, surface, mount technology, defects related SPP, Critical Variables},
   Year 	= {1999} }


% 233) Record # 172
@article{,
   Author	= {Rodriguez, G. and Baldwin, D. F.},
   Title 	= {Analysis of solder paste release in fine pitch stencil printing processes},
   Journal	= {Transactions of the ASME. Journal of Electronic Packaging},
   Volume	= {121},
   Number	= {3},
   Pages	= {169-78},
   Abstract	= {Advanced electronics packaging technologies such as chip scale packages, fine pitch ball grid arrays, and flip chip are pushing solder paste stencil printing to the limit. In order to achieve solder print deposits of the sizes required for emerging electronic packaging technology, a rigorous understanding of the process is required. This paper seeks to expand our understanding of the physical characteristics of stencil printing specifically focusing on the solder paste release process based on experimental and analytical approaches. First, designed experiments were conducted to identify the main process variables affecting final print quality. An in-situ measurement system using a high speed imaging system monitored the solder paste release process. Based on experimental observations, different modes of solder paste release and their corresponding mechanisms were identified. A model was developed to predict print quality for fine pitch applications. The proposed model was experimentally verified showing good agreement with measured values for fine pitch and very fine pitch printing. It was found that the cohesive and adhesive forces acting on the paste tend to govern the release process rather than the viscous and inertial forces},
   Keywords	= {fine-pitch technology. packaging. soldering},
   Year 	= {1999} }


% 234) Record # 171
@article{Chung95,
   Author	= {Chung, C.W. and Srihari, K.},
   Title 	= {A "Closed Loop" System For The Realtime Control Of Solder Paste Stencil Printing},
   Journal	= {Journal Of Electronics Manufacturing},
   Volume	= {5},
   Number	= {2},
   Pages	= {99-109},
   Year 	= {1995} }


% 235) Record # 170
@phdthesis{Venka96,
   Author	= {Venkateswaran, S.},
   Title 	= {Comprehensive Process Control for Solder Paste Stencil Printing},
   School	= {State University of New York at Binghamton},
   Year 	= {1996} }


% 236) Record # 169
@phdthesis{Chung93,
   Author	= {Chung, Chao-Wen},
   Title 	= {Closed Loop Process Control for Solder Paste Stencil Printing},
   School	= {State University of New York at Binghamton},
   Abstract	= {The importance of solder paste has increased along with the move towards fine and ultra- fine pitch Surface Mount Components (SMCs). Increasing component lead counts and decreasing lead pitches mandate the need to thoroughly understand surface mount technology and solder paste related issues. For fine pitch applications, solder paste is best applied to the PCB by using a stencil, a stencil printer, and a squeegee. The print quality depends on several domain related parameters such as the printing equipment used, the PCB characteristics, the stencil, and the solder paste used. These factors are often inter-related. Studying the general relationship among the domain parameters and their effects on a print will help achieve good print quality. Knowledge based expert systems can be used to provide decision support, design closed loop control systems, diagnose defects, and monitor processes in every facet of the surface mount PCB assembly domain. The heuristic nature of this domain and the lack of widespread domain knowledge makes it an ideal field for expert system development and use.The global objective of this research was to design and develop a prototype real-time closed-loop process control system to monitor the solder paste stencil printing process for the assembly of surface mount PCBS. This prototype knowledge based stencil printing process control system was implemented on a personal computer and connected to the stencil printer and a laser based solder paste inspection system to form a closed-loop. Validation of this system reveals that this prototype is capable of recommending the expected printing parameters for either a 'new' PCB application or an 'existing' PCB application. Furthermore, this stencil printing process control system can communicate with the DEK 265 stencil printer to transmit the print commands and to precisely adjust the print parameter values. This prototype process control system achieves 'optimal' print conditions through an iterative approach.},
   Year 	= {1993} }


% 237) Record # 168
@phdthesis{,
   Author	= {Yang, C-J.},
   Title 	= {Process Optimization for Surface Mount Printed Circuit Board Assembly},
   School	= {State University of New York at Binghamton},
   Type 	= {Ph.D.},
   Abstract	= {During the past decade, electronic products have decreased in size and weight. At the same time, their functionality has increased. Cost has always been (and continues to be) a primary concern. These market driven needs have resulted in the widespread use of fine/ultra-fine leaded pitch "standard" surface mount devices and in the increasing popularity of leadless surface mount components, such as ball grid arrays. Along with these trends in electronics manufacturing, increased competition and a continually evolving technology are requiring manufacturing engineers to systematically improve their process to ensure "zero defects" through extremely high first pass yields. These factors have caused the need for the development and implementation of a systematic continual process improvement strategy, which was a focus of this research. Solder paste application concerns have become more important in electronics manufacturing as technology moves to finer lead spacing and packages. Effective and high quality surface mount techniques involve not only precise process setup but also the understanding of material characteristics and the knowledge of assembly processes. Environmental and cost concerns have resulted in the implementation of "no-clean" processes. There are a number of differences between water-soluble and no- clean paste in terms of both processing requirements and overall chemistry. Any user moving to a no-clean process should be extremely knowledgeable about the special requirements of these pastes because such knowledge can mean the difference between an expensive high defect process and a high yield, low cost one. This is also a challenge that is faced by the most contract manufacturing environments. The orderly transition from a process that requires the cleaning step to one that does not was another focus of this research. This research had two major objectives. The first objective was to provide and validate a systematic method to "optimize" the surface mount printed circuit board assembly process. The process steps considered range from stencil printing through reflow soldering. The second focus was the identification of a systematic process to transition to a no-clean assembly process. Process improvement and capability studies will be performed to build up the knowledge base and to validate concepts. An in-depth understanding of process features would allow for meaningful experiments to be statistically designed and applied to model the characteristics of the stencil printing and the reflow processes. A predictable "optimal" process can then be obtained based on these models. Guidelines for the transition to a no-clean process will be identified and validated through this research.},
   Keywords	= {ENGINEERING, INDUSTRIAL (0546), ENGINEERING, ELECTRONICS AND ELECTRICAL (0544)},
   Year 	= {1998} }


% 238) Record # 167
@article{,
   Author	= {Woodward, S.L. and Chesnutt, A.E. and Gnauck, A.H. and Lu, X.},
   Title 	= {Transmission of M-QAM signals using an unisolated DFB laser},
   Journal	= {IEEE Photonics Technology Letters},
   Volume	= {10},
   Number	= {11},
   Pages	= {1644-1646},
   Abstract	= {We examine the transmission of M-ary quadrature-amplitude modulated (M-QAM) signals using an unisolated distributed-feedback (DFB) laser. Since forward-error-correction is readily available, it is employed in the experiments. We demonstrate that unisolated DFB's can transmit over 80 64-QAM channels; these could carry 500 compressed video channels.},
   Keywords	= {video signal processing, cable television, optical fibre subscriber loops, distributed feedback lasers, quadrature amplitude modulation, optical modulation, optical transmitters, M-QAM signal transmission, unisolated DFB laser, M-ary quadrature-amplitude modulated signals, forward-error-correction, QAM channels, compressed video channels, cable TV},
   Year 	= {1998} }


% 239) Record # 166
@article{,
   Author	= {Gagne, D. and Quaglia, M. and Shina, S. G.},
   Title 	= {Method for Paste Selection and Process Optimisation for Fine-pitch SMT},
   Journal	= {Soldering & Surface Mount Technology},
   Volume	= {8},
   Number	= {3},
   Pages	= {9 - 11},
   Abstract	= {This paper outlines a methodology of paste selection for fine-pitch SMT using a sequential investigation process including Design of Experiments (DoE) techniques. Several factors including SMT machine parameters as well as environmental conditions were investigated as to their effect on the soldering process. Materials and processes were selected for optimum performance. This resulted in the development of a robust fine-pitch SMT process for the Hewlett Packard (hp) Medical Equipment Group in Andover, Massachusetts.},
   Keywords	= {Paste, Fine Pitch Components, Optimisation},
   Year 	= {1996} }


% 240) Record # 165
@article{,
   Author	= {Warwick, M. and Harpley, I.},
   Title 	= {The Development of High Speed Printing Solder Pastes for Fine Pitch Applications},
   Journal	= {Soldering & Surface Mount Technology},
   Volume	= {9},
   Number	= {2},
   Pages	= {29 - 32},
   Abstract	= {`Fine Pitch' and `High speed printing' are relative terms but many solder paste users see capability in meeting these two requirements as their major goals for process improvements. Not surprisingly, solder paste rheology governs both, and this paper describes how the complex relationship between resins and solvent can lead to solder pastes with optimised performance. Work on the physical behaviour of resin solutions and how this relates to solder paste rheology is reported. These results are related to user experience on volume production processes.It is worth emphasising that this study set out to make measurements on products with significantly different properties. The results show that it is possible to relate in a general way the rheology of the fully formulated product to its printing performance, and the observations are consistent with commonsense knowledge about the process. A note of caution should be raised because printing defects and inconsistencies within a given process are much more subtle than the effects studied here. The reproducibility of the rheological measurements is also quite low, and so there remains no substitute for testing the finished product under real process conditions. While there are clues for screening raw materials for suitability in high speed printing products, other factors than could be reported here come into play.},
   Keywords	= {Solder Paste, Printing, Fine Pitch Components},
   Year 	= {1997} }


% 241) Record # 164
@article{,
   Author	= {Jeff, Kennedy},
   Title 	= {A study of solder paste printing requirements for CSP technology},
   Journal	= {Soldering & Surface Mount Technology},
   Volume	= {12},
   Number	= {3},
   Pages	= {13 - 19},
   Abstract	= {This paper describes the methodology used to evaluate several different stencil fabrication methods, aperture sizes and thicknesses and different solder pastes. Data collected included the number of printing defects and measurement of solder paste volume and height. Statistics have been used for the analysis of quantitative data. Results from this evaluation have been critical in the success of a new process for CSP assembly in a standard SMT environment. Stencil designs and solder paste selection for other applications have also benefited from the conclusions of this study.},
   Keywords	= {Solder Paste, Printing, Chipscale Packaging, Stencils, Design, Smta},
   Year 	= {2000} }


% 242) Record # 163
@article{,
   Author	= {MPM Corporation},
   Title 	= {MPM's rheometric pump print head improves stencil printing consistency},
   Journal	= {Soldering & Surface Mount Technology},
   Volume	= {11},
   Number	= {1},
   Pages	= {15l},
   Year 	= {1999} }


% 243) Record # 162
@article{,
   Author	= {Valladares, H.},
   Title 	= {Build Cycle Time Reduction through Process Optimisation},
   Journal	= {Soldering & Surface Mount Technology},
   Volume	= {9},
   Number	= {1},
   Pages	= {4 - 7},
   Abstract	= {Since establishing a low volume, high reliability surface mount technology (SMT) facility, a number of problems have been overcome as part of the learning experience. The tailoring of processes for a flexible assembly area brought to light a number of issues that traditional SMT facilities do not face. This paper describes the many processes optimised by the SMT facility team in becoming an on-time, high reliability producer. The topics include the development of design standards, forming, tinning, stencil printing, and component placement. Several producibility enhancements are also described in a case-study of a solder mask evaluation project. The paper describes the many process improvements implemented over the past few years.},
   Keywords	= {Optimisation, Printed Circuit Boards, Cycle Times},
   Year 	= {1997} }


% 244) Record # 158
@inproceedings{,
   Author	= {Buttars, S. P.},
   Title 	= {Parameters for solder paste printing for fine pitch components},
   BookTitle	= {NEPCON West},
   Address	= {Anaheim, CA},
   Volume	= {3},
   Pages	= {1254-1265},
   Abstract	= {Studies have shown that almost 70% of the solder related defects are caused by printing process},
   Year 	= {1993} }


% 245) Record # 157
@article{,
   Author	= {Anjard, Sr., Ronald P.},
   Title 	= {Factors influencing the quality of solder powder used in solder pastes for thick film circuits, printed circuit boards and the electronics industry in general},
   Journal	= {Powder Technology},
   Volume	= {36},
   Number	= {2},
   Pages	= {189-202},
   Abstract	= {This report is intended to share some of the unique technology which has been developed to improve solder paste quality in terms of rheology, solderability and minimization of solder ball generation (maximization of metal retention).},
   Year 	= {1983} }


% 246) Record # 156
@article{,
   Author	= {Liu, Qingbin and Orme, Melissa},
   Title 	= {High precision solder droplet printing technology and the state-of-the-art},
   Journal	= {Journal of Materials Processing Technology},
   Volume	= {115},
   Number	= {3},
   Pages	= {271-283},
   Abstract	= {The continuing drive toward more complex integrated circuits (ICs) devices having lower cost, higher inputs/outputs (I/Os), greater operating speeds, increased functions per chip, and smaller device geometry has pushed the package requirements far beyond the capability of traditional packages, such as solder paste printing (SPP). Solder droplet printing technology is low cost, non-contact, flexible and data driven, and environmentally friendly has thus been discussed as an enabling technology for precisely placing fine solder deposits onto a variety of smaller substrates. It is therefore suitable for a variety of applications including direct chip attach site preparation, three-dimensional substrates, fine line interconnect, substrate via fill, optoelectronics and many others. It would also allow manufacturing techniques that are impossible or unfeasible with current technology, such as localized replacement of solder on board, depositing solder in different thickness on the same board, or using more than one type of solder on the same board. Recently, many experiments and studies have been under investigation by several groups. In this paper, the principle of the solder droplet printing technology is introduced and recent experimental results and potential application of the technology in the microelectronics industry are also included and evaluated.},
   Year 	= {2001} }


% 247) Record # 155
@article{,
   Author	= {Rocak, Dubravka and Stopar, Vinko and Plut, Janeta Fajfar},
   Title 	= {Solder paste for fine line printing in hybrid microelectronics},
   Journal	= {Microelectronics Journal},
   Volume	= {26},
   Number	= {5},
   Pages	= {441-447},
   Abstract	= {A series of experiments was performed to evaluate the deposit consistency of solder paste from various producers, for fine line printing. Two main variables were chosen to determine the quality of the solder paste printing process. The results of a two-factorial experimental design are presented and the effect of these factors on solder paste thickness and visual appearance are discussed.The results of two factorial experiments show that the best visual appearance after printing was obtained with Indalloy SMQ-51 solder paste. More failures were observed on the substrates printed with Indalloy IPN and Qualitek 650 solder pastes after soldering, than on the substrates printed with the other solder pastes. No influence of the main printing parameters on solder paste height variation was observed, but the influence of the squeegee speed on printed height was found for Qualitek, Multicore and Alpha Metals solder pastes. When printed with a higher squeegee speed, the solder paste deposit was higher. This effect is greater when printing with a higher stencil thickness. No influence of the printing parameters on solder linewidth after printing and after soldering was observed, but lines printed with Indalloy IPN solder paste show greater widths after 24 hours drying at room temperature than the others, so the occurrence of bridging between closely spaced lines is possible.},
   Year 	= {1995} }


% 248) Record # 154
@inproceedings{,
   Author	= {Farkas, Z. D.},
   Title 	= {On the solution method: optimization with minimal information},
   BookTitle	= {The Statistical Institute: 16th International Symposium on Mathematical Programming, Session TU3-M-IN202},
   Address	= {Lausanne},
   Year 	= {1997} }


% 249) Record # 153
@book{,
   Author	= {Kay, Steven M.},
   Title 	= {Fundamentals of statistical signal processing : estimation theory},
   Publisher	= {PTR Prentice-Hall},
   Address	= {Englewood Cliffs, N.J.},
   Series	= {Prentice Hall signal processing series},
   Keywords	= {Signal processing Statistical methods., Estimation theory., Signals Processing},
   Year 	= {1993} }


% 250) Record # 152
@misc{Mon+Dre99,
   Author	= {Monari, G.  and Dreyfus, G.},
   Title 	= {Local Linear Least Squares: Performing Leave-one-out Without Leaving Anything Out},
   Publisher	= {HTTP},
   Volume	= {2002},
   Number	= {May 22},
   Abstract	= {Based on a local linear expansion, in parameter space, of the least squares solution, we show that the effect of removing an example from the training set can be accurately predicted, and that, in addition, the geometrical interpretation of this expansion leads to a method of detecting models which are likely to exhibit overfitting. As a consequence, the computationally expensive leave-one-out procedure can be replaced by a prediction thereof: instead of training N different models on the data sets with N-1 examples, one has to train a single model on the whole data set. Moreover, we demonstrate that selecting models on the basis of the performance evaluation after leave-one-out training may lead to overfitted model even if the jacobian matrix is shown to be non-singular.The price to be paid for predicting the leave-one result is the computation of the diagonal elements of the orthogonal projection matrix onto the local solution subspace, in the neighborhood of the parameter vector obtained by training; this computational overhead is still very slight since this computation must be performed after training only. We have performed a detailed comparison between standard leave-one-out and our method, on a teacher-student problem, for performance evaluation and model selection. The method is by no means specific to neural networks: it can be applied to any nonlinear regression method, provided the jacobian matrix of the model is easily available.},
   Keywords	= {"Learning" Conference, Snowbird, 1999},
   Year 	= {1999} }


% 251) Record # 151
@misc{,
   Author	= {Andina-de-la-Fuente, Diego},
   Title 	= {Nonlinear Multilayer Backpropagation Networks},
   Publisher	= {HTTP},
   Volume	= {2002},
   Number	= {April 15},
   Year 	= {2002} }


% 252) Record # 150
@phdthesis{Barajas98,
   Author	= {Barajas, Leandro G.},
   Title 	= {Neural-fuzzy embedded control system},
   School	= {Universidad Distrital F.J.C.},
   Type 	= {B.S. Honored Thesis},
   Abstract	= {This work presents a parallel hybrid control system that uses as main tools Fuzzy Logic and Neural Networks, showing the practical applications that these technologies have in the industry. Neural-Fuzzy Embedded Control System (SCINEF) was applied to the control of a 1MW-power generator to optimize its set point, diminishing in that way its fuel consumption up to in a 20% and decreasing the generator and refrigeration system wear. SCINEF includes RS232 and RS485 serial communications modules with speeds up to 115.2 Kbps, programmable digital inputs/outputs, relay outputs, parallel printer port, AD/DA converters to the analog interface with the fuzzy micro-controller and how general purpose analog input/output, analog voice play/recording module and Smart Cards interface. As main computing module it uses a Z80180 processor, which can be programmed in C and assembler languages, in which It was implemented, besides the conventional digital control, the neural network. The fuzzy logic processing module use the Programmable Analog IC (PAICTM) AL220 which can use up to 4 analog inputs and 4 analog outputs, 111 fuzzy variables, 50 rules that can be evaluated up to 500K rules/sec. The neural network used is a feed forward with 2 inner layers and back propagation was used as learning algorithm. To the hardware develop the PC/104 standard was used for physical dimensions and control signals, giving the possibility of integrate any kind and quantity of peripheral drivers that the system could require. The main advantages of this control system a re its high response velocity, proved efficiency, hardware versatility, software flexibility, high learning capabilities and the fact that it is a system easy to adapt to different industrial processes without any kind of hardware modifications.},
   Keywords	= {Fuzzy Logic, Fuzzy Hardware, AL220, Neural Networks, feed-forward, back-propagation, Hybrid Control System, parallel processing, PC/104, Smart Card, Analog Voice Recording, Power Generation Control.},
   Year 	= {1998} }


% 253) Record # 149
@inproceedings{Barajas02,
   Author	= {Barajas, Leandro G. and Kamen, Edward W. and Goldstein, Alex and Egerstedt, Magnus and Small, Benjamin},
   Title 	= {A closed-loop hybrid control algorithm for stencil printing},
   BookTitle	= {Surface Mount Technology Association International Conference (SMTA02)},
   Editor	= {SMTA},
   Address	= {Boston, MA},
   Pages	= {51-58},
   Abstract	= {In this paper a control algorithm, that generates adequate machine settings for the Stencil Printing Process (SPP) in Surface Mount Technology manufacturing, is presented.  The SPP is characterized by high process-noise levels, and by requiring constant solder-paste volume deposition at all times.  Due to the prohibitive cost associated with extensive testing, only a limited amount of information can be used in the decision-making.  The major constraint when controlling the SPP is that it is not possible to evaluate the output of the system an arbitrary number of times, since for each calculation the printing and inspection of at least one or even two new boards is required.  These difficulties are addressed by the controller proposed in this paper, which is based on an algorithm for generating a sequence of iterative values that converge to an optimum set of machine parameters for a desired solder paste volume.  The merit of the control is that it minimizes the variance and the steady state error of the weighted sample mean versus the desired height, which improves the quality of the process.  In addition, it considers print direction and different component types independently.  Finally, this controller also automatically corrects for the process errors associated with the loss of the solder-paste working-viscosity-point, which can occur due to unscheduled stops on the line, and for incorrect specification of machine parameters given by the operator.},
   Keywords	= {Stencil printing process control, least squares, affine estimator, Volume: Single best predictor, LS},
   Year 	= {2002} }


% 254) Record # 148
@techreport{,
   Author	= {SMC},
   Title 	= {Action Plan for Survival - 2010, Identification of Roadblocks for Success},
   Institution	= {Surface Mount Council},
   Number	= { -101},
   Type 	= {SMC},
   Month	= {September},
   Abstract	= {The first attempt of the Technology Vision 2010 was an analysis of existing industry roadmaps that were developed by a cross-section of technology experts. Industry working teams addressed areas of similarity, gaps, and inconsistencies between the individual roadmaps. These areas of differences were noted in the summary section. Items not common to the roadmaps were noted, but not used in the direct comparison. Other information as well as the expertise of the participants was used to evaluate the analysis and develop the summary and recommendations contained in the individual sections. The goal of this paper is the identification of Roadblocks to Success. To help identify those "roadblocks" the Surface Mount Council has developed this analysis of the state of the industry. This analysis was begun in January of 2000 and is now being presented to provide an overview of the changes and challenges within our industry. Surface Mount Council members currently active on the National Roadmap Coordinating Committee and the major national electronics roadmaps, e.g. NEMI, provided input for this paper. As with the original Vision 2010 document this paper is not intended to provide a review of the national roadmaps. Rather this is an analysis intended to stress where action needs to be taken. The Surface Mount Council will attempt to act as a catalyst for future action to remove the "roadblocks" our industry faces.},
   Year 	= {2000} }


% 255) Record # 147
@techreport{,
   Author	= {IPC},
   Title 	= {Calculation of In Process DPMO and Manufacturing Indices for Printed Board Assemblies},
   Institution	= {IPC},
   Number	= {- 9261},
   Type 	= {IPC},
   Month	= {June},
   Abstract	= {DPMO and Assemblies, Attributes and Variables Identification, IPC Task Group, (5-22g), 5th Working Draft},
   Year 	= {2000} }


% 256) Record # 146
@article{,
   Author	= {Hall, S.},
   Title 	= {The ultrafine-pitch printing process},
   Journal	= {Circuits Assembly},
   Volume	= {3},
   Number	= {8},
   Pages	= {54-58},
   Abstract	= {Ultra-fine printing process consists of dividing the complicated printing process into less complex parts and addressing each part individually. The main three components that define printing quality are the location of the solder paste, the amount of paste and the defination of the deposited paste. These components are in turn controlled by screen printer capability, stencil design and selection, solder paste selection and parameter setting through designed experimentation. Each of these areas are discussed in detail. Every solder joint provides an opportunity for both error and improvement. If manufacturing/process engineers are allowed to devote sufficient time to methodical step by step approach, overall process defects will decrease, resulting in higher productivity and reduced rework costs. It is now possible to successfully print ultra-fine pitch patterns using a combination of proper paste and equipment selection and process control.},
   Keywords	= {Journal Article, Printing, Alloy plating, Soldered joints, Process, control, 58 Metallic Coating},
   Year 	= {1992} }


% 257) Record # 145
@article{,
   Author	= {Foran, Bill},
   Title 	= {Solid solder deposit},
   Journal	= {Printed Circuit Fabrication},
   Volume	= {18},
   Number	= {12},
   Pages	= {24-26},
   Abstract	= {As the pitch between surface amount devices continuous to drop, the electronics industry will need to continue to search for manufacturing methods that will allow the production of high-quality, low-cost interconnection packages. In this connection, solid solder devices (SSD) technology is potential solution. There are three SSD technologies that offer assemblers a planar surface, ready for component attachment. While the initial attraction of these technologies may be the ability to provide a flat soldering surface, the added benefits of reduced process steps and increased quality definitely should not be ignored.},
   Keywords	= {Printed circuit manufacture, Screen printing, Surface mount, technology, Masks, Printed circuit boards, Electronics industry,, Electric wiring, Electronics packaging, Surfaces, Solid solder deposit, Solder paste process, Octipad, Precision pad, technology, Sipad, E 538.1.1 Soldering, E 714.2 Semiconductor Devices and Integrated, Circuits, E 745.1 Printing, E 931.2 Physical Properties of Gases,, Liquids and Solids},
   Year 	= {1995} }


% 258) Record # 144
@article{,
   Author	= {Seelig, Karl},
   Title 	= {Solder paste comparison},
   Journal	= {Circuits Assembly [CIRC ASSEM]},
   Volume	= {7},
   Number	= {7},
   Pages	= {4ppp},
   Abstract	= {Movement to a low-residue no-clean process offers some advantages over popular medium-residue no-cleans. However, this does not happen without any tradeoffs. Knowing one's particular chemistry and strictly adhering to the individual processing requirements of the material will help keep defect levels down and manufacturing costs to a minimum, and will help deliver the clean, visually appealing assembly the customer wants.},
   Keywords	= {Soldering, Printed circuit boards, Assembly, Printed circuit, testing, Thermogravimetric analysis, Coating techniques,, Industrial furnaces, Defects, Solder paste, No clean material, Low residue solder pastes, Medium, residue solder pastes, Circuit assembly, Conformal coating, Reflow, furnace, S 714.2 Semiconductor Devices and Integrated Circuits, S 715, Electronic Equipment, General Purpose and Industrial, S 913.4, Manufacturing, S 538.1.1 Soldering, S 913.1 Production, Engineering, E 714.2 Semiconductor Devices and Integrated, Circuits, E 715 Electronic Equipment, General Purpose and, Industrial, E 913.4 Manufacturing, E 538.1.1 Soldering, E 913.1, Production Engineering},
   Year 	= {1996} }


% 259) Record # 143
@article{,
   Author	= {Roos-Kozel, B.},
   Title 	= {Reliable Solder Paste Quality Control},
   Journal	= {Brazing Soldering},
   Volume	= {10},
   Pages	= {35-37},
   Abstract	= {Solder paste used for SMT (surface mount technology) must meet many specifications because each company starting SMT manufacturing has written its own specification based on MIL (US), DIN, or solder paste vendor recommendations. It would be advantageous if a standard solder paste QC, containing easily performed, reliable tests existed. QC tests useful for establishing vendor quality and manufacturing process tolerances from those necessary to give an accurate indication of on-the-line performance is distinguished. 7 ref.--AA},
   Keywords	= {Electric devices, Fabrication, Solders, Quality control, Printed, circuits, Soldering, 63 Electronic devices},
   Year 	= {1986} }


% 260) Record # 142
@article{,
   Author	= {Anjard, R. P.},
   Title 	= {Quality and Reliability in the Application of Solder Paste to Electronics and Microelectronics},
   Journal	= {Feingeratetechnik},
   Volume	= {12},
   Pages	= {552-556},
   Abstract	= {Solder paste has achieved an important role in the manufacture of micro-electronic components and their joining to circuit boards. Its reliability is influenced by inclusions, short circuits, and poor solderability arising from bad solder constituents and spherical solder powder formation. The latter is especially important, spherical particles of uniform diameter being most desirable. Unfortunately no standards exist for surface preparation, reflow, or removal of flux residues. There is also no standard metallurgy. Over 85% are Sn-base, LSn62/32Pb/2Ag, LSn60 /40Pb, LSn95/5Ag. Particle size ranges are <200>325 mesh, or for fine line printing < 325. Particles need not be spherical; drop shapes are acceptable. Control of oxygen content is most important. Organic materials mixed with the solder are colophony (or a mixture of various resins) as a carrier, solvents which control viscosity, and other organics such as thixotropic-, activator-, and wetting-agent materials. Testing, application, reflow, and cleaning are discussed.--B.L.},
   Keywords	= {Electric devices, Soldering, Printed circuits, Soldering, Solders,, Quality control, 63 Electronic devices},
   Year 	= {1988} }


% 261) Record # 141
@article{,
   Author	= {Pfeifer, H. J. and Ritter, K.},
   Title 	= {Proper Solder Paste Pressure--a Primary Prerequisite of Successful Reflow Soldering},
   Journal	= {Schweisstechnik (Berlin)},
   Volume	= {38},
   Number	= {10},
   Pages	= {457-460},
   Abstract	= {Reflow, infrared, and vapor-phase soldering of surface-mounted devices depends on successful application on the use of proper solder paste pressures. Equipment and process requirements and circuit board design rules are discussed.--AA},
   Keywords	= {Electric devices, Soldering, Printed circuits, Soldering, Flow, soldering, 55 Joining},
   Year 	= {1988} }


% 262) Record # 140
@inproceedings{,
   Author	= {Loh, Horng-Hai and Lu, Ming-Sing},
   Title 	= {Printed circuit board inspection using image analysis},
   BookTitle	= {The 1995 International IEEE/IAS Conference on Industrial Automation and Control: Emerging Technologies},
   Address	= {PISCATAWAY, NJ},
   Publisher	= {IEEE},
   Pages	= {673-677},
   Abstract	= {This paper presents an inspection system for the defects on Surface Mounted Device (SMD) printed circuit boards (PCBs). There are five types of defects, namely, missing component, misalignment, wrong orientation of IC chip, wrong parts and poor solder joints. Thus, different algorithms are developed to detect these faults. Vision system has been introduced into almost every level of PCB manufacturing. They include PCB pattern inspection machines, Surface Mounted Device (SMD) mounter with visual positioning, mounted SMD visual inspection machines, soldering inspection machines, assembled PCB visual inspection machines etc. Most of these vision systems are integrated successfully and achieve significant benefits. But the rapid development of surface mounted technology makes precision SMD mounters and visual inspection machines become necessary. Today, efforts are being made to develop precision SMD mounters and solder inspection systems [1].},
   Keywords	= {Printed circuit boards, Image analysis, Surface mount technology,, Defects, Vision, Optical systems, Quality control, Soldered, joints, Algorithms, Inspection equipment, Integrated circuits, Solder inspection systems, Misalignment, Wrong orientation,, Missing component, Solderability, Solder paste, S 913.3.1 Inspection, S 714.2 Semiconductor Devices and Integrated, Circuits, S 741.3 Optical Devices and Systems, S 913.3 Quality, Assurance and Control, S 538.1.1 Soldering, E 913.3.1 Inspection,, E 714.2 Semiconductor Devices and Integrated Circuits, E 741.3, Optical Devices and Systems, E 913.3 Quality Assurance and, Control, E 538.1.1 Soldering},
   Year 	= {1995} }


% 263) Record # 136
@article{,
   Author	= {Anson, Scott and Sahay, C. and Head, Linda and Constable, James},
   Title 	= {Determination of parameters affecting solder paste tack strength as measured in the IPC tack test: a classical design of experiments approach},
   Journal	= {Journal of Electronic Packaging, Transactions of the ASME},
   Volume	= {118},
   Number	= {2},
   Pages	= {94-100},
   Abstract	= {Solder paste is used in the electronics industry to connect surface mount circuit components to printed wiring boards. A printed wire board (PWB) is populated with components by applying solder paste on the PWB, placing components and finally reflowing the solder paste in an oven. Between the time the component is placed on the PWB and the solder paste is reflowed, the components are to be held in position. This is helped by tackiness of the paste. The present paper describes an experimental investigation of the tack strength of three solder pastes with probe size, probe surface roughness, drying time, and surrounding pressure. The results indicate that the probe size has a significant and dominant effect on all the pastes examined. A mechanistic view of the possible mechanism for this phenomenon is also presented. Measured tack strength is shown not to be simple adhesion, but to include a vacuum under the test probe that increases tack strength (force per unit area) as probe size increases.},
   Keywords	= {Strength of materials, Mechanical variables measurement,, Electronic equipment testing, Surface mount technology, Printed, circuit boards, Surface roughness, Drying, Pressure, Solder paste, Tack strength, Printed wiring boards, Probe size,, Drying time, S 538.1.1 Soldering, S 421 Strength of Building Materials,, Mechanical Properties, S 943.2 Mechanical Variables Measurements,, S 714.2 Semiconductor Devices and Integrated Circuits, S 931.2, Physical Properties of Gases, Liquids and Solids, E 538.1.1, Soldering, E 421 Strength of Building Materials, Mechanical, Properties, E 943.2 Mechanical Variables Measurements, E 714.2, Semiconductor Devices and Integrated Circuits, E 931.2 Physical, Properties of Gases, Liquids and Solids},
   Year 	= {1996} }


% 264) Record # 135
@article{,
   Author	= {Hwang, J. S.},
   Title 	= {Considerations for Surface Mounting Solder Paste},
   Journal	= {Brazing Soldering},
   Number	= {14},
   Pages	= {13-21},
   Month	= {Spring},
   Abstract	= {Solder paste as a joining material provides electrical, thermal and mechanical functions in an assembly. Its performance and quality are vital to the integrity of solder joints which, in turn, are important to the overall function of the assembly. As the microelectronics/electronics industry continues to strive for "quality" in every level of materials, designs and processes, and continues to grow and innovate, the demands on solder paste will be increasingly stringent. In an attempt to enhance information flow in some of the key areas, this paper comprises three parts: the first part summarises solder paste technology to provide paste users with understanding of solder paste in its technological aspects; the second part outlines some specific solutions or considerations to the problems encountered while using solder paste in surface mounting; the third part is to review some basic failure phenomena in metals and alloys in general terms, including fatigue, creep, thermal fatigue and corrosion-enhanced fatigue, to brief the state-of-the-art of solder joint reliability studies, and to provide some comments on solder joint appearance in relation to solder joint reliability. 53 ref.--AA},
   Keywords	= {Aluminum, Soldering, Transition metals, Soldering, Lead (metal),, Soldering, Indium, Soldering, Indium base alloys, Soldering, Lead, base alloys, Soldering, Joining, Soldered joints, Mechanical, properties, Fatigue (materials), Composition effects, Creep, (materials), Corrosion resistance, Solders, Materials selection,, Pastes, Materials selection, Electric devices, Fabrication, 63 Electronic devices},
   Year 	= {1988} }


% 265) Record # 134
@inproceedings{,
   Author	= {Linton, J.},
   Title 	= {Characterization of the mechanical properties of solder paste for quality control and process optimization},
   BookTitle	= {20th Symposium for Testing and Failure Analysis},
   Address	= {Los Angeles, California, USA},
   Publisher	= {ASM International (USA)},
   Pages	= {473-477},
   Abstract	= {The paper examines how the mechanical properties of solder paste are quantified. The results are discussed in terms of incoming quality control, optimization of force applied onto components by pick-and-place robots and deterring the acceptable time span between completion of screening and finishing component placement, completion of screening and finishing component placement. Quantification of paste characteristics is more important than ever. Present trends in technology and environmental regulations are causing manufacturers to operate inside ever shrinking process windows. Examination of the repeatability of mechanical characteristics is a logical fast nonchemical test that can be done. Tackiness testing requires very low load tensile testing equipment. The test involves placing a set amount of force for a specified period of time. The force required to remove a probe from the paste is measured. The information obtained from this type of test has three main uses: incoming quality control, optimization of placement equipment and determining time span allowable for completion of parts placement. Placing a component on a circuit board with too much or too little force increases the chance of parts not attaching to the board properly during reflow. By examining the adhesion strength of components it is possible to optimize the downwards force of pick-and-place robots. Once solder paste is screened onto a circuit board it has a high surface area to volume ratio. As a result the solvents evaporate at a fast rate. As the paste dries up it becomes less tacky. Attempts to use paste outside certain tackiness range risks an increase in defect levels.},
   Keywords	= {Conference Paper, Integrated circuits, Fabrication, Soldering,, Pastes, Mechanical properties, Quality control, Tensile strength, 63 Electronic Devices},
   Year 	= {1994} }


% 266) Record # 133
@article{,
   Author	= {Mahon, J.},
   Title 	= {Automatic 3-D Inspection of Solder Paste on Surface Mount Printed Circuit Boards},
   Journal	= {Journal of Materials Processing Technology},
   Volume	= {26},
   Number	= {2},
   Pages	= {245-256},
   Abstract	= {The development of surface mount printed circuit board technology has generated a need for new inspection systems to deal with its problems and peculiarities. A system which was designed to locate and measure the area, height and volume of the solder paste deposited on surface mount printed circuit boards is described. The inspection is driven by the layout information available from CAD data. The system can automatically focus itself to function on a warped printed circuit board, and register boards with fast fiducial location. 9 ref.--AA},
   Keywords	= {Printed circuits, Soldering, Solders, Inspection, Automation,, Monitoring, Closed circuit television, 55 Joining},
   Year 	= {1991} }


% 267) Record # 132
@article{,
   Author	= {Mahon, J. and Harris, N. and Vernon, D.},
   Title 	= {Automated visual inspection of solder paste deposition on surface mount technology PCBs},
   Journal	= {Comp. Ind.},
   Volume	= {12},
   Number	= {1},
   Pages	= {31-42},
   Abstract	= {The development of surface mount printed circuit board technology has generated a need for new inspection systems to deal with its problems and peculiarities. This paper describes a system which was designed to locate and measure the area of the solder paste deposited on surface mount printed circuit boards. It measures the distance by which the solder paste is displaced from the solder pads that it is supposed to be covering and reports this to a host system. The board is inspected one device at a time using the layout information obtained from CAD data. The inspection route is optimized using a "simulated annealing" technique.},
   Keywords	= {printed circuit boards, surface mount technology, inspection,, quality control, machine vision, electronic equipment manufacture, solder paste deposition, i 8300 electronic engineering, c ca19.4 electronic devices, c, ca2.2 pattern recognition, i mage processing, m achine vision, e, ed20.6 fabrication techniques},
   Year 	= {1989} }


% 268) Record # 131
@article{,
   Author	= {Ayoub, George T.},
   Title 	= {3-D solder paste measurement technique},
   Journal	= {Surface Mount Technology},
   Volume	= {7},
   Number	= {9},
   Pages	= {22-26},
   Abstract	= {To ensure the same or higher quality for fine pitch as that for a standard pitch surface mount, the probability of defect per pad/ component must decrease substantially. This requires a focused effort in all phases of manufacturing. One of the leading causes of defects is the paste application process. The automated paste inspector plays a dual role. As an inspection system, it identifies and reports defects; as a measuring system, it helps maintain a high product quality level by relating the measurements to the process parameters and feeding back the information necessary to control the process.},
   Keywords	= {Printed circuit boards, Image processing, Defects, Process, control, Inspection, Automation, Laser applications, SMT production line, Fine pitch surface mount, Paste height, measurement, Solder pastes, E 714 ELECTRONIC COMPONENTS AND TUBES, E 731 AUTOMATIC CONTROL, PRINCIPLES AND APPLICATIONS, E 723.2 Data Processing, C 714, ELECTRONIC COMPONENTS AND TUBES, C 731 AUTOMATIC CONTROL, PRINCIPLES AND APPLICATIONS, C 723.2 Data Processing, MP 714, ELECTRONIC COMPONENTS AND TUBES, MP 731 AUTOMATIC CONTROL, PRINCIPLES AND APPLICATIONS, MP 723.2 Data Processing},
   Year 	= {1993} }


% 269) Record # 130
@article{Nyberg95,
   Author	= {Nyberg, Lindley},
   Title 	= {`First article' inspection and what to look for},
   Journal	= {Surface Mount Technology},
   Volume	= {9},
   Number	= {11},
   Pages	= {48-49},
   Abstract	= {The inspection of the first board in surface mount technology assemblies should be detailed in order to minimize the chance of costly error before a full-blown production run. Three major steps for first article inspection are described. These steps are: first article inspection for stencil printer; first article inspection for pick and place; and first article inspection for reflow soldering. This description is for a simple assembly of 0.025 inches-pitch parts of larger on FR-4 substrates using Sn63/Pb37 paste.},
   Keywords	= {Printed circuit boards, Surface mount technology, Inspection,, Screen printing, Soldering, Quality control, Soldering alloys, First article inspection, Stencil printer, Reflow soldering, E 714.2 Semiconductor Devices and Integrated Circuits, E 913.3.1, Inspection, E 745.1 Printing, E 538.1.1 Soldering, E 913.3 Quality, Assurance and Control, E 531 Metallurgy and Metallography},
   Year 	= {1995} }


% 270) Record # 129
@article{,
   Author	= {Jones, Stephen and Erdmann, Gunter},
   Title 	= {Print stroke variations},
   Journal	= {Surface Mount Technology},
   Volume	= {9},
   Number	= {11},
   Pages	= {2pp},
   Abstract	= {Printed circuit manufacturers have become aware of throughput capability when considering the purchase of a new stencil printer. This has prompted stencil printer manufacturers to take serious interest in improving their cycle times by creating print stroke innovations. Several approaches to the print stroke are introduced, with the specific intent of producing accurate, well-defined solder pads at increased rates of squeegee travel, thus lowering machine cycle time. These approaches include: squeegee angle; board rotation; variable print direction; and vibrating squeegee.},
   Keywords	= {Printed circuit boards, Surface mount technology, Screen printing,, Soldering, Print stroke variations, Squeegee, Stencil, E 714.2 Semiconductor Devices and Integrated Circuits, E 745.1, Printing, E 538.1.1 Soldering},
   Year 	= {1995} }


% 271) Record # 128
@article{,
   Author	= {Zarrow, Phil and Kopp, Debra},
   Title 	= {Surface-mount assembly evolution},
   Journal	= {Printed Circuit Design},
   Volume	= {14},
   Number	= {2},
   Pages	= {25-27},
   Abstract	= {Single-center reflow soldering (SCRS), an innovation in printed circuit board (PCB) assembly process is discussed. SCRS is also known as paste-in-pin and paste intrusion, it is a process by which through-hole components residents on an assembly are reflow soldered simultaneously with surface-mount components while passing through a reflow oven. SCRS offers the elimination of wave soldering or at least, the reduction of hand soldering. The three methods of solder deposition used for SCRS are discussed such as syringe dispensing, solder performs and stencil printing. The incompatibility of automatic component insertion equipment with SCRS is addressed.},
   Keywords	= {Printed circuit boards, Soldering, Deposition, Soldered joints,, Screen printing, Printed circuit design, Temperature, Robotics,, Computer vision, Computer software, Algorithms, Cost effectiveness, Single center reflow soldering, Flex cell design, Through hole, components, S 714.2 Semiconductor Devices and Integrated Circuits, S 641.1, Thermodynamics, S 731.5 Robotics, S 723.5 Computer Applications, S, 723.1 Computer Programming, E 714.2 Semiconductor Devices and, Integrated Circuits, E 641.1 Thermodynamics, E 731.5 Robotics, E, 723.5 Computer Applications, E 723.1 Computer Programming},
   Year 	= {1997} }


% 272) Record # 127
@article{Lotfi+Howarth98a,
   Author	= {Lotfi, A. and Howarth, M.},
   Title 	= {Industrial application of fuzzy systems: Adaptive fuzzy control of solder paste stencil printing},
   Journal	= {Information Sciences},
   Volume	= {107},
   Number	= {1-4},
   Pages	= {273-285},
   Abstract	= {This paper presents an adaptive fuzzy control algorithm for the control of the solder paste stencil printing stage of surface mount printed circuit board (PCB) assembly. The proposed method of automatic solder paste stencil printing consists of four blocks: fuzzy feature extraction, defect classification of paste deposits, adaptive fuzzy rule-based model identification and subsequently an optimal control action for the stencil printing process. Experimental results are presented to illustrate the capability of the algorithm.An algorithm for automatic control of solder paste stencil printing process of SMT is developed to reduce the number of board failures using an adaptive fuzzy controller. The prototype of the proposed automatic control is implemented and it demonstrates the capability of a fuzzy system to model and produce a good control accion for solder paste stencil printing.},
   Keywords	= {Surface mount technology, Printed circuit boards, Fuzzy sets,, Fuzzy control, Adaptive algorithms, Feature extraction, Knowledge, based systems, Adaptive control systems, Optimal control systems,, Identification (control systems), Solder paste stencil printing, C-means clustering, C 714 Electronic Components and Tubes, C 714.2 Semiconductor, Devices and Integrated Circuits, C 921 Applied Mathematics, C, 731.1 Control Systems, C 723 Computer Software, Data Handling and, Applications, C 723.5 Computer Applications},
   Year 	= {1998} }


% 273) Record # 126
@article{Mahajan99,
   Author	= {Mahajan, Roop L.},
   Title 	= {Neural nets for modeling, optimization and control in semiconductor manufacturing},
   Journal	= {Proceedings of SPIE - The International Society for Optical Engineering},
   Volume	= {3812},
   Pages	= {176-187},
   Abstract	= {This paper provides an overview of our recent work in the development of neural network models for optimization and control of electronic manufacturing processes. The concepts of physical-neural network models and model transfer are described and demonstrated to be effective in building accurate neural network models economically. Process diagnostic techniques using multiple neural networks are reviewed and shown to be accurate for fault diagnosis. Finally, recent strategies in integration of statistical and neural network tools for process control are discussed. Several examples from electronics manufacturing such as chemical vapor deposition and fine pitch stencil printing are described to illustrate application of the basic concepts discussed.},
   Keywords	= {Mathematical models, Semiconductor device manufacture,, Optimization, Process control, Failure analysis, Chemical vapor, deposition, Electronic manufacturing processes, Process diagnostic technique,, Fault diagnosis, C 723.4 Artificial Intelligence, C 921.5 Optimization Techniques,, C 714.2 Semiconductor Devices and Integrated Circuits, C 731.1, Control Systems, C 802.2 Chemical Reactions},
   Year 	= {1999} }


% 274) Record # 125
@article{Durairaj01,
   Author	= {Durairaj, R. and Nguty, T. A. and Ekere, N. N.},
   Title 	= {Critical factors affecting paste flow during the stencil printing of solder paste},
   Journal	= {Soldering & Surface Mount Technology},
   Volume	= {13},
   Number	= {2},
   Pages	= {30 - 34},
   Abstract	= {The paste printing process accounts for the majority of assembly defects, and most defects originate from poor understanding of the effect of printing process parameters on the printing performance. As the current product miniaturisation trend continues, area array type package solutions are now being designed into products. The assembly of these devices requires the printing of very small solder paste deposits. The printing of solder pastes through small stencil apertures typically results in stencil clogging and incomplete transfer of paste to the PCB pads. At the very narrow aperture sizes required for flip-chip applications, the paste rheology becomes crucial for consistent paste withdrawal. This is because, for smaller paste volumes, surface tension effects become dominant over viscous flow. Proper understanding of the effect of the key material, equipment and process parameters, and their interactions, is crucial for achieving high print yields. During the aperture filling and emptying sub-process, the solder paste experiences forces/stresses as it interacts with the stencil aperture walls and the pad surfaces, which directly impact the paste flow within the apertures. As the substrate and stencil separate, the frictional/adhesive force on the stencil walls competes directly with the adhesives/pull force on the PCB pads, often resulting in incomplete paste transfer or skipping/clogged apertures. In this paper, we investigate the effect of stencil design on the printing process and in particular the effect on paste transfer efficiency.____________This paper has presented results of a study of the effect of stencil design on the printing process and, in particular, the effects on paste transfer efficiency. Proper understanding of the effects of aperture design is essential because, during the aperture filling and emptying sub-processes , the solder paste experiences forces/stresses as it interacts with the stencil aperture walls and the pad surfaces which directly impact the paste flow within the apertures. The analysis shows that, as the substrate and stencil separate, the frictional/adhesive forces on the stencil walls compete directly with the adhesives/pull force on the PCB pads, often resulting in incomplete paste transfer or skipping/ clogged apertures. This means that the aspect/area ratio is an important factor in addressing the challenges of printing solder pastes at ultra-fine geometries such as are required for flip-chip technology.The results show that for good paste transfer the aspect and area ratios should be higher than 1.25 and above 0.6 respectively, as lower paste height deposits were obtained for apertures with aspect and area ratios below 1.25 and 0.6 respectively. Experimental observation also showed that skipping occurs mainly for the apertures with ratios well below these figures, but the more dominant parameter appears to be the area ratio. At very small geometries, such as those now being used for flip chip applications, the stencil design should be based on both the area/aspect ratios to ensure efficient paste transfers and consistency in paste deposit thickness and volume from pad-to-pad, and from board-to-board. It should also be noted that the paste particle size and other paste properties directly impact on paste transfer, and further improvements in paste formulation will help improve printing performance if these ratios can be lowered.},
   Keywords	= {Solder Paste, Stencil Printer, Viscosity, Pastes},
   Year 	= {2001} }


% 275) Record # 124
@misc{,
   Author	= {McPhail, D.},
   Title 	= {Screen printing is a science, not an art [SMT PCBs]},
   Publisher	= {HTTP},
   Volume	= {2002},
   Number	= {June 1},
   Pages	= {25 - 28},
   Abstract	= {In a production environment, the first process applied to a bare printed circuit board is generally the application of solder paste. It has been reported that 60% of all rework is attributable to poor quality solder paste deposition. If this process is not understood or the incorrect selection of paste, screen/stencil or squeegee is used, then regardless of technical capabilities of the printer, it will not be possible to achieve accurate and repeatable quality of work.This paper reports on the basics of solder paste deposition with mathematical formulas and diagrams to support the correct selection of criteria. Most importantly, it is intended to assist in the selection process and provide an understanding of the reasons for selecting a specific solder/stencil/squeegee to be used in conjunction with the printer. Written and compiled from a production (real world) view-point, this paper recognises that it is certainly possible to use a non-standard process parameter, and still achieve ultra-fine pitch print capability in laboratory or small batch scenario. But primarily this paper is a guidance and recommendation to achieve excellent results, with as large a process window as is possible for production purposes.},
   Keywords	= {Screen Printing, Solder Paste, Deposition,assembling. fine-pitch technology. maintenance engineering. printed circuit manufacture. quality control. soldering. surface mount technology, defects related SPP},
   Year 	= {1996} }


% 276) Record # 122
@article{,
   Author	= {DeBlis, J.},
   Title 	= {Implementing solid solder deposits (SSDs) in PCB manufacture},
   Journal	= {Circuit World},
   Volume	= {28},
   Number	= {1},
   Pages	= {10 - 14},
   Abstract	= {Solid solder deposit (SSD) technology was developed in the early to mid-1990s to improve first pass yields in the manufacture of electronic devices. Examines the SSD process and how this technology differs from a transfer of the paste printing process from the assembly site to the board fabricator. Other questions considered include what design considerations should be addressed in implementing SSDs, what the benefits are for the end-user, what types of product are best suited to SSD, and how a board fabricator should implement this technology in a manufacturing environment.},
   Keywords	= {Printed Circuit Boards, Solder, Interconnection},
   Year 	= {2002} }


% 277) Record # 121
@article{,
   Author	= {Poon, Gary K. K. and Williams, D. J.},
   Title 	= {Characterization of a solder paste printing process and its optimization},
   Journal	= {Soldering & Surface Mount Technology},
   Volume	= {11},
   Number	= {3},
   Pages	= {23 - 26},
   Abstract	= {The objectives of this research are to model the screening process with planned experiments and to identify the optimal setting of the process parameters so as to minimize the printing defects. The percentage volume matching (PVM) and defects per unit (DPU) are the two quality characteristics of interest. A fractional factorial design was employed to study simultaneously the effects of eight process factors on the PVM and DPU and their possible interactions. Subsequent analysis shows that a low level of the stencil cleaning interval and low temperature results in the minimum DPU while maintaining a PVM very close to 100 per cent. Empirical relationships between these two quality characteristics and the important factors were formulated using regression analysis and close matches were found during subsequent validation experiments.Simple fractional factorial designs and response surface were effectively used to characterize a multi-parameter solder paste printing process for fine pitch circuitry. Linear prediction models were established to predict the quality performance of the process using the two most significant process parameters identified, and were found to be highly accurate. Simultaneous optimization of two quality characteristics of the printing process was considered achieved, in a sense that the NPU was minimized within the allowable process window.},
   Keywords	= {Solder Paste, Stencil Printer, Optimization},
   Year 	= {1999} }


% 278) Record # 114
@article{Durairaj02,
   Author	= {Durairaj, R. and Jackson, G. J. and Ekere, N. N. and Glinski, G. and Bailey, C.},
   Title 	= {Correlation of solder paste rheology with computational simulations of the stencil printing process},
   Journal	= {Soldering & Surface Mount Technology},
   Volume	= {14},
   Number	= {1},
   Pages	= {11-17},
   Abstract	= {Soldering technologies continue to evolve to meet the demands of the continuous miniaturisation of electronic products, particularly in the area of solder paste formulations used in the reflow soldering of surface mount devices. Stencil printing continues to be a leading process used for the deposition of solder paste onto printed circuit boards (PCBs) in the volume production of electronic assemblies, despite problems in achieving a consistent print quality at an ultra-fine pitch. In order to eliminate these defects a good understanding of the processes involved in printing is important. Computational simulations may complement experimental print trials and paste characterisation studies, and provide an extra dimension to the understanding of the process. The characteristics and flow properties of solder pastes depend primarily on their chemical and physical composition and good material property data is essential for meaningful results to be obtained by computational simulation.This paper describes paste characterisation and computational simulation studies that have been undertaken through the collaboration of the School of Aeronautical, Mechanical and Manufacturing Engineering at Salford University and the Centre for Numerical Modelling and Process Analysis at the University of Greenwich. The rheological profile of two different paste formulations (lead and lead-free) for sub 100 micron flip-chip devices are tested and applied to computational simulations of their flow behaviour during the printing process.____________Solder paste characterization and rheological studies coupled with computational simulations offer an insight into the mechanisms of the stencil printing process that would otherwise not be available. The comparisons between a lead and lead-free paste sample presented here are only one example of the vast characterization studies possible. For example, the same procedures can be applied to the comparison of samples with varying rheological properties of the flux system whilst maintaining the sample particle material and size distribution or vice –versa. Further rheological testing and development of the computational models is required however to account for microscopic phenomena that may have a significant influence on the paste behavior at a macroscopic scale. This includes the phenomenon of wall slip where flux rich regions adjacent to a solid surface form a lubricating layer, reducing or eliminating the shear rate of the solid particles. The application of these results at a macroscopic scale to the boundary conditions of aperture filling and emptying simulations at a microscopic scale will further enhance the understanding of the critical parameters and conditions that will be required to maintain stencil printing as a leading solder deposition process for the continued miniaturization of electronic components,},
   Keywords	= {Solder Pastes, Rheology, Stencils},
   Year 	= {2002} }


% 279) Record # 110
@techreport{,
   Author	= {IPC},
   Title 	= {Calculation of DPMO and Manufacturing Indices for Printed Board Assemblies},
   Number	= {- 7912},
   Type 	= {IPC},
   Month	= {July},
   Year 	= {2000} }


% 280) Record # 109
@article{,
   Author	= {Lathrop, R.R., Jr.},
   Title 	= {Benchmarking the Surface-Mount Process},
   Journal	= {Circuits Assembly},
   Number	= {April},
   Month	= {April},
   Year 	= {2000} }


% 281) Record # 108
@article{,
   Author	= {Cawley, Jeffery L.},
   Title 	= {Improving Yield with Statistical Process Control},
   Journal	= {Circuits Assembly},
   Number	= {March},
   Month	= {March},
   Keywords	= {SPC},
   Year 	= {1999} }


% 282) Record # 107
@techreport{Braunstein93,
   Author	= {Braunstein, Daniel and Asada, Haruhiko},
   Title 	= {Real Time Process Monitoring of Solder Paste Stencil Printing},
   Institution	= {Motorola Inc. and MPM Corp.},
   Number	= {August-December},
   Type 	= {Progress Report:},
   Keywords	= {SPP Model Identification, equations, RLS LS, exponential forgetting},
   Year 	= {1993} }


% 283) Record # 106
@inproceedings{Johnson01,
   Author	= {Johnson, Alden and Flori, Albert},
   Title 	= {High Density/Fine Feature Solder Paste Printing},
   BookTitle	= {Proceedings  of APEX},
   Abstract	= {To achieve low PPM defects in solder paste printing of high density and fine feature sizes certain rules must be followed in the original manufacturing design.  The stencil printer must be capable of aligning to the substrate but there are six other factors that have to be considered before a consistent print can be achieved.   These factors include stencil thickness; aperture size and shape (hole wall aspect ratio) squeegee type and paste particle size. This paper will discuss the parameters that should be optimized to achieve high yields and some possible trade off if you are not willing to incorporate these rules in your manufacturing design.__________Solder paste printing in the Surface Mount industry has come a long way in the in the past fifteen years.  At first the 50 mil pitch devices were a problem as far as defect rate, now as packages shrink in size and increase in lead count we see the defect rate very high 100 to 200 PPM defect rate on the 20 mill pitch and below while manufacturing sees six sigma quality rates on the larger pitch components.  It is well documented that stencil printing contributes to high defect rates for the surface mount assembly process the root cause of the defect may be too complex to ascertain.   The paste printing process has four major variables, printer, stencil, substrate and solder pasteBased on the analysis results, the following is recommended:The following factor combinations provide the best print quality and consistent solder paste heights: a stencil aperture at 10 mils with square shapes, stencil thickness of 4, solder paste type 5, and polyethylene blades 90 durometer.  If trade offs are to be made the defect rates will increase resulting in higher manufacturing costs repair costs or warranty repairs.},
   Keywords	= {ANOVA},
   Year 	= {2001} }


% 284) Record # 105
@article{Ries98,
   Author	= {Ries, Bob},
   Title 	= {3-D Post Printing Inspection},
   Journal	= {Circuits Assembly},
   Number	= {June},
   Pages	= {40-47},
   Month	= {June},
   Keywords	= {3D 2D, 10x, Volume: Single best predictor, sampled and 100%, in-line, off-line inspection , Symptoms and possible causes and actions},
   Year 	= {1998} }


% 285) Record # 104
@article{,
   Author	= {Kloeser, Joachim and Heinricht, Katrin and Jung, Erik and Lauter, Liane and Ostmann, Andreas and Aschenbrenner, Rolf and Reichl, Herbert},
   Title 	= {Low cost bumping by stencil printing: process qualification for 200 um pitch},
   Journal	= {Microelectronics Reliability},
   Volume	= {40},
   Number	= {3},
   Pages	= {497-505},
   Abstract	= {Area array packages (flip chip, CSP (Chip scale packages) and BGA) require the formation of bumps for the board assembly. Since the established bumping methods need expensive equipment and/or are limited by the throughput, minimal pitch and yield, the industry is currently searching for new and lower cost bumping approaches. The experimental work of stencil printing to create solder bumps for flip chip devices is described in detail in this article. In the first part of this article, a low cost wafer bumping process for flip chip applications will be studied in particular. The process is based on an electroless nickel under bump metallization and solder bumping by stencil printing. The experimental results for this technology will be presented, and the limits concerning pitch, stencil design, reproducibility and bump height will be discussed in detail. In the second part, a comparison of measured standard deviations of bump heights as well as the quality demands for ultrafine pitch flip chip assembly are shown.},
   Year 	= {2000} }


% 286) Record # 102
@inproceedings{Zoh+Bog91,
   Author	= {Zohdy, M.A. and Adamczyk, B.},
   Title 	= {Least squares approach to constrained global optimization},
   BookTitle	= {Decision and Control, 1991., Proceedings of the 30th IEEE Conference on},
   Address	= {Dept. of Electr. & Syst. Eng., Oakland Univ., Rochester, MI, USA},
   Pages	= {945-946},
   Abstract	= {The authors present a stochastic least squares approach to the problem of determining the global extremum of multivariable nonlinear objective functions subject to constraints. The approximate value of the global extremum is found by using a special transformation followed by least squares estimation. The corresponding optimal coordinates are derived by a neural network.},
   Keywords	= {least squares approximations, neural nets, optimisation, constrained global optimization, stochastic least squares approach, global extremum, multivariable nonlinear objective functions, neural network},
   Year 	= {1991} }


% 287) Record # 101
@article{Yost93,
   Author	= {Yost, G.R.},
   Title 	= {Acquiring knowledge in Soar},
   Journal	= {Expert, IEEE [see also IEEE Intelligent Systems]},
   Volume	= {8},
   Number	= {3},
   Pages	= {26-34},
   Abstract	= {The strategies used in designing limited method-based tools can be applied to the much broader method that underlies Soar, called the problem space computational model (PSCM). Taql (for task acquisition language), which is the computer representation of PSCM, is discussed. Taql, together with its programming environment, comprises the Soar-based expert-system development tool. A Taql specification consists of a set of Taql constructs, each of which describes some aspect of a PSCM knowledge role. Each of Taql's 17 constructs is a list consisting of a type and a name for the Taql construct instance, followed by a list of arguments. Each argument specifies some aspect of the construct's PSCM knowledge role. Taql's effectiveness is attributed to a combination of PSCM's simplicity and flexibility and the principled way in which Taql was designed.},
   Keywords	= {specification language, knowledge acquisition, Soar, method-based tools, problem space computational model, Taql, task acquisition language, PSCM, programming environment, expert-system development tool, specification, argument, expert systems, formal specification, programming environments, software tools, specification languages},
   Year 	= {1993} }


% 288) Record # 100
@article{Sta+Kam00,
   Author	= {Stan, O. and Kamen, E.},
   Title 	= {A local linearized least squares algorithm for training feedforward neural networks},
   Journal	= {Neural Networks, IEEE Transactions on},
   Volume	= {11},
   Number	= {2},
   Pages	= {487-495},
   Abstract	= {In training the weights of a feedforward neural network, it is well known that the global extended Kalman filter (GEKF) algorithm has much better performance than the popular gradient descent with error backpropagation in terms of convergence and quality of solution. However, the GEKF is very computationally intensive, which has led to the development of efficient algorithms such as the multiple extended Kalman algorithm (MEKA) and the decoupled extended Kalman filter algorithm (DEKF), that are based on dimensional reduction and/or partitioning of the global problem. In this paper we present a new training algorithm, called local linearized least squares (LLLS), that is based on viewing the local system identification subproblems at the neuron level as recursive linearized least squares problems. The objective function of the least squares problems for each neuron is the sum of the squares of the linearized backpropagated error signals. The new algorithm is shown to give better convergence results for three benchmark problems in comparison to MEKA, and in comparison to DEKF for highly coupled applications. The performance of the LLLS algorithm approaches that of the GEKF algorithm in the experiments.},
   Keywords	= {feedforward neural nets, linearisation techniques, least squares approximations, Kalman filters, filtering theory, convergence, computational complexity, backpropagation, local linearized least squares algorithm, feedforward neural network training, weight training, global extended Kalman filter, GEKF algorithm, convergence, solution quality, efficient algorithms, multiple extended Kalman algorithm, MEKA, decoupled extended Kalman filter algorithm, DEKF, dimensional reduction, partitioning, local linearized least-squares algorithm, LLLS, local system identification subproblems, recursive linearized least-squares problems, linearized backpropagated error signals},
   Year 	= {2000} }


% 289) Record # 98
@article{Lau97,
   Author	= {Lau, Francis K. H. and Yeung, Vincent W. S.},
   Title 	= {A hierarchical evaluation of the solder paste printing process},
   Journal	= {Journal of Materials Processing Technology},
   Volume	= {69},
   Number	= {1-3},
   Pages	= {79-89},
   Abstract	= {Solder paste printing is one of the most critical processes in applying Surface Mount Technology. Investigation has shown that PCBA defectives derived out from reflow soldering inspection, in-circuit testing, and function testing up to final quality inspection, are heavily induced by poor solder paste printing. A hierarchy has been developed according to the stages and importance of the set-up of the printing process. The hierarchy consists of six levels: (i) geometry of the stencil openings resulting from fabrication method employed; (ii) solder paste matching; (iii) waiting time effects; (iv) squeegee materials selection; (v) printing machine operation parameter design; and (vi) reflow soldering process parameter design. The mechanisms, responses and factors within each level have been evaluated and optimized. Relationships amongst the levels were formulated to generate the complete set-up. Taguchi's Method was applied to the evaluation of level 5 and level 6, using L27 and L18 orthogonal arrays, respectively. ANOVAs were also run to test the significance of the results. The significant control factors were identified and optimized accordingly. The settings and rules of the hierarchy were established. Confirmation trials and follow-up showed that there was up to 25% reduction in the defect rate and 20% saving of the labour cost. The findings of the project illustrate a complete mechanism for material processing evaluation and improvement.},
   Keywords	= {Solder paste printing, Reflow soldering, SMT processing, Hierarchical evaluation, Taguchi's method, Defect rate, Quality control, defects related SPP, General Recomendations, big components, metal squeegee, angle, speed, pressure, cleaning interval, sap-off speed, temp & humidity , taguchi L18},
   Year 	= {1997} }


% 290) Record # 97
@book{,
   Author	= {Poor, H. Vincent},
   Title 	= {An introduction to signal detection and estimation},
   Publisher	= {Springer-Verlag},
   Address	= {New York},
   Edition	= {2nd},
   Series	= {Springer texts in electrical engineering},
   Keywords	= {Signal detection., Signal theory (Telecommunication), Estimation theory.},
   Year 	= {1994} }


% 291) Record # 96
@book{Pap91,
   Author	= {Papoulis, Athanasios},
   Title 	= {Probability, random variables, and stochastic processes},
   Publisher	= {McGraw-Hill},
   Address	= {New York},
   Edition	= {3rd},
   Series	= {McGraw-Hill series in electrical engineering. Communications and signal processing},
   Keywords	= {Probabilities., Random variables., Stochastic processes.},
   Year 	= {1991} }


% 292) Record # 94
@inproceedings{,
   Author	= {Wu, X. and Li, F. and Tang, K.H. and Yeh, C.-P. and Wyatt, K.},
   Title 	= {Solder joint design optimization for fine pitch component applications},
   BookTitle	= {Thermal and Thermomechanical Phenomena in Electronic Systems, 1998. ITHERM '98. The Sixth Intersociety Conference on},
   Editor	= {Bhavnani, S.H. and Kormann, G.B. and Nelson, D.J.},
   Address	= {Motorola Inc., Schaumburg, IL, USA},
   Pages	= {236-240},
   Abstract	= {Fine pitch leaded components, such as TSOP/QFP, have been widely used in portable electronics in recent years. One of the most critical issues in the electronic packaging industry is to find effective ways to reduce manufacturing related solder joint defects in these electronic components. During the fine pitch component reflow process, major failure mechanisms include solder bridging, solder opens, insufficient soldering, etc. This research aims to develop a physics-based validated modeling methodology, allowing for effective simulation of the solder joint formation process and prediction of the above solder defects. The goal of the methodology is to determine the optimal solder joint configuration (i.e. bond pad size, stencil aperture design, solder volume, etc.) in a cost-effective manner. The solder joint formation process during the solder solidification stage has been simulated using the Surface Evolver software tool. This paper consists of three integral parts: (1) simulation of the 3D solder joint formation process for the final solder joint geometry configurations; (2) determination of the optimal pad/stencil aperture; and (3) determination of the optimal solder paste volume and material. The methodology can also enable one to analyze the safety margin for a given pad/stencil aperture design. Finally, the simulation models were used to accurately pinpoint the deficiencies in certain pad/stencil aperture designs, which can cause solder bridging, opens or insufficient soldering.},
   Keywords	= {fine-pitch technology, packaging, reflow soldering, solidification, assembling, circuit simulation, design engineering, optimisation, failure analysis, circuit reliability, solder joint design optimization, fine pitch component applications, fine pitch leaded components, TSOP, QFP, portable electronics, electronic packaging, manufacturing related solder joint defects, electronic components, fine pitch component reflow process, failure mechanisms, solder bridging, solder opens, insufficient soldering failure, physics-based validated modeling methodology, solder joint formation process simulation, solder defect prediction, optimal solder joint configuration, bond pad size, stencil aperture design, solder volume, cost-effectiveness, solder joint formation process, solder solidification stage, Surface Evolver software tool, 3D solder joint formation process simulation, final solder joint geometry configuration, optimal pad/stencil aperture, optimal solder paste volume, optimal solder material, pad/stencil aperture design safety margin, simulation models, pad/stencil aperture design},
   Year 	= {1998} }


% 293) Record # 90
@inproceedings{Okura95,
   Author	= {Okura, T. and Kanai, M. and Ogata, S. and Takei, T. and Takakusagi, H.},
   Title 	= {Optimization of solder paste printability with laser inspection technique},
   BookTitle	= {Electronics Manufacturing Technology Symposium, 1995. 'Manufacturing Technologies - Present and Future', Seventeenth IEEE/CPMT International},
   Address	= {Piscataway, NJ},
   Publisher	= {IEEE},
   Pages	= {361-365},
   Abstract	= {This paper describes an evaluation technique for solder paste printability using a solder paste inspection system and optimization of printing parameters. In a Surface Mount Assembly (SMA), it is very important to evaluate printability of solder paste precisely, because printability of solder paste directly influences reflow soldering quality. We established quite reliable inspection criteria for print quantity of solder paste. So it was found that about 90% of reflow soldering defects could be reduced by prevention of printing defects. Furthermore, since package types have been varied in a SMA, high soldering quality demands stable printability for all patterns. This paper presents a printability evaluation adopted procedure based on the quality engineering (TAGUCHI method). As a result of optimizing squeegee shape and printer condition by this evaluation method, printability was improved better than 20% in the production process. And optimization of solder paste and stencil added to printer condition resulted in good printability for 0.3 mm pitch patterns on the optimum condition.},
   Keywords	= {reflow soldering, inspection, laser beam applications, printing, surface mount technology, solder paste printability, laser inspection technique, printing parameters, surface mount assembly, reflow soldering quality, inspection criteria, package types, TAGUCHI method, squeegee shape, production process, stencil, pitch patterns, 0.3 mm, SPP defects, ANOVA},
   Year 	= {1995} }


% 294) Record # 88
@article{,
   Author	= {Morris, J.R. and Wojcik, T.},
   Title 	= {Stencil printing of solder paste for fine-pitch surface mount assembly},
   Journal	= {Components, Hybrids, and Manufacturing Technology, IEEE Transactions on [see also IEEE Trans. on Components, Packaging, and Manufacturing Technology, Part A, B, C]},
   Volume	= {14},
   Number	= {3},
   Pages	= {560-566},
   Abstract	= {A generic study involving solder paste characterization, stencil configuration, printed wiring board layout, and printing parameters was performed. The authors summarize findings in the following areas: solder paste-powder particle size distribution, rheology, slump, and solder ball formation; stencils-single versus dual thickness, brass or other materials, opening sizes, vendor capabilities; printed wiring boards-pad geometry, dimensional tolerance, pad surface finish; printing process-setup and alignment, squeegee materials, printing speed downward pressure; and, component placement-handling, placement accuracy, force limitations. Some practical concerns, including the current process operating window and future fineness of print limitations, are discussed.},
   Keywords	= {solder paste stencil printing, dual thickness stencil, single thickness stencil, reflow soldering, fine-pitch surface mount assembly, solder paste characterization, stencil configuration, printed wiring board layout, printing parameters, powder particle size distribution, rheology, slump, solder ball formation, brass, opening sizes, vendor capabilities, pad geometry, dimensional tolerance, pad surface finish, setup, alignment, squeegee materials, printing speed downward pressure, component placement, handling, placement accuracy, force limitations, process operating window, fineness of print limitations, printed circuit manufacture, soldering, surface mount technology, General Recomendations, ad-hoc pressure speed, wipe each 5 boards, snap-off 0.254 = 0.010},
   Year 	= {1991} }


% 295) Record # 86
@article{Mannan94,
   Author	= {Mannan, S.H. and Ekere, N.N. and Ismail, I. and Lo, E.K.},
   Title 	= {Squeegee deformation study in the stencil printing of solder pastes},
   Journal	= {Components, Packaging, and Manufacturing Technology, Part A, IEEE Transactions on [see also Components, Hybrids, and Manufacturing Technology, IEEE Transactions on]},
   Volume	= {17},
   Number	= {3},
   Pages	= {470-476},
   Abstract	= {We report on the results of an experimental comparison of different types of squeegee blade used in the stencil printing of solder pastes for reflow soldering in SMT, concentrating on paste heights (scooping) and printing defects. We show how our experimental results for squeegee deformation into stencil apertures lead to the construction of a model for squeegee deformation. The model takes into account the force on the squeegee due to solder paste flow and some of the non-Newtonian properties of the solder paste. An explanation is proposed for the differences in paste heights between apertures of different orientations.},
   Keywords	= {printing, soldering, surface mount technology, printed circuit manufacture, squeegee deformation study, stencil printing, solder pastes, reflow soldering, SMT, paste heights, printing defects, nonNewtonian properties, aperture orientation, equations, _|_ //},
   Year 	= {1994} }


% 296) Record # 83
@inproceedings{Lotfi97,
   Author	= {Lotfi, A. and Howarth, M. and Thomas, P.D.},
   Title 	= {Orthogonal fuzzy model of the solder paste printing stage of surface mount technology},
   BookTitle	= {Fuzzy Systems, 1997., Proceedings of the Sixth IEEE International Conference on},
   Address	= {Dept. of Mech. & Manuf. Eng., Nottingham Trent Univ., UK},
   Publisher	= {Application},
   Volume	= {3},
   Pages	= {1433-1437},
   Abstract	= {The novel idea of an orthogonal fuzzy rule-based system is introduced in this paper. It is shown that in a fuzzy rule-based system where rules are orthogonal, each rule induces its maximum effect on the final decision. Using 18 orthogonal fuzzy rules, a model for the solder paste printing stage of SMT is created. The predicted percentage of deposit volume from the orthogonal and non-orthogonal models are compared with actual values. The orthogonal model shows less error in 85% of the data points.},
   Keywords	= {fuzzy systems, fuzzy set theory, knowledge based systems, soldering, surface mount technology, modelling, printed circuit manufacture, orthogonal fuzzy model, solder paste printing, surface mount technology, fuzzy rule-based system, orthogonal rules, fuzzy set theory, PCB assembly},
   Year 	= {1997} }


% 297) Record # 81
@article{,
   Author	= {Lathrop, R.R., Jr.},
   Title 	= {Solder paste print qualification using laser triangulation},
   Journal	= {Components, Packaging, and Manufacturing Technology, Part C, IEEE Transactions on [see also Components, Hybrids, and Manufacturing Technology, IEEE Transactions on]},
   Volume	= {20},
   Number	= {3},
   Pages	= {174-182},
   Abstract	= {A method for determining the printability of a solder paste has been developed using laser triangulation based sensor hardware. The noncontact attribute of this measurement method is ideal for wet print measurements. The effect on material printability of both formulation and process elements are discussed. Results indicate that powder size has a definite and significant effect on the printability of the solder paste for 20 mil pitch applications. Bare board outer layer anomalies are characterized by surface scans and virtual cross sections.The need for an objective measurement for determining solder paste printability is highly applicable to today’s widespread application of fine pitch design in SMT [5]. Laser triangulation can be effectively used to determine printability in solder paste. The slump characteristics as a result of time, temperature or humidity can be quantified. Surface topography of bare boards coupled with the ability to perform virtual or nondestructive cross sections can be a basis for printing process improvements and stencil aperture fine tuning. Effects on printability of variations in material formulation elements such as powder size and flux rheology are measurable. Suitability of solder paste design can be accurately assessed by both material formulators and users by objectively measuring key functional parameters. This fundamental capability allows SMT material manufactures to access the suitability of their materials for today’s challenging market.},
   Keywords	= {soldering, printed circuit testing, surface mount technology, fine-pitch technology, measurement by laser beam, optical sensors, automatic optical inspection, spatial variables measurement, solder paste print qualification, solder paste printability, laser triangulation based sensor hardware, noncontact measurement method, wet print measurements, process elements, powder size, fine pitch applications, bare board outer layer anomalies, surface scans, virtual cross sections, SMT, HASL anomalies, 20 mil},
   Year 	= {1997} }


% 298) Record # 80
@article{,
   Author	= {Kolli, V.G. and Gadala-Maria, F. and Anderson, R.},
   Title 	= {Rheological characterization of solder pastes for surface mount applications},
   Journal	= {Components, Packaging, and Manufacturing Technology, Part B: Advanced Packaging, IEEE Transactions on [see also Components, Hybrids, and Manufacturing Technology, IEEE Transactions on]},
   Volume	= {20},
   Number	= {4},
   Pages	= {416-423},
   Abstract	= {Accurate rheological measurements are needed in order to correlate the rheological behavior of solder pastes to their performance in the surface mount technology (SMT) process. In this paper, we summarize our efforts to measure the rheological properties of solder pastes, and outline the difficulties in obtaining their true rheological properties. In particular, we show that the rheological measurements of solder pastes are affected by "slip" at the test-apparatus surfaces and by shear fracture within the sample which have not been taken into consideration heretofore.This study illustrates the difficulties in characterizing the rheology of the solder pastes used in surface mount technology (SMT). Apparent slip at the walls of the apparatus, internal slip in the samples, and shear fracture severely limit the determination of the rheological properties of solder pastes with the parallel plates geometry. Measurements using smooth surfaces are plagued by apparent wall slip at low shear rates and by expulsion of the sample at high shear rates. Rough surfaces may be used to prevent wall slip and valid data can be obtained before shear fracture occurs in the sample. This valid data could be used as a basis of comparison between different solder pastes. The steady shear properties of the solder pastes do not seem amenable to determination from steady shear tests, at least with the parallel plates geometry.},
   Keywords	= {soldering, surface mount technology, rheology, fracture, materials testing, rheological characterization, solder pastes, surface mount applications, rheological measurements, SMT process, shear fracture},
   Year 	= {1997} }


% 299) Record # 74
@inproceedings{Fuji91,
   Author	= {Fujiuchi, S.},
   Title 	= {Fundamental study on solder paste for fine pitch soldering},
   BookTitle	= {Electronics Manufacturing Technology Symposium, 1991., Eleventh IEEE/CHMT International},
   Address	= {IBM Japan, Shiga, Japan},
   Pages	= {163-165},
   Abstract	= {For fine pitch QFP soldering, solder amount and locations applied on pad must be precisely controlled. Solder paste has been printed individually on each pad for most card assemblies, but this printing method is confronted with process control difficulties. As a solution of these potential problems, a new type of printing method, in which many pads are covered with one bar (or belt) shaped paste pattern, is under evaluation. The author describes some experimental studies of solder paste suitable for this printing method and the feasibility for fine pitch soldering. An experiment on three kinds of solder pastes showed that low-melting solder containing SN-Pb-Bi eutectic solder was suitable for this method because of its good solderability and even solder amount on each pad after reflow soldering. These advantages seemed to result from partial melting of low-melting solder and bonding between solder particles during preheating in the reflow process. This was confirmed by scanning electron microscopy. With this printing method, soldering of fine pitch (0.5/0.3 mm) leads was successfully demonstrated.},
   Keywords	= {solder paste, fine pitch soldering, QFP soldering, printing method, low-melting solder, partial melting, preheating, reflow process, scanning electron microscopy, SnPbBi solder, packaging, printed circuit manufacture, soldering, surface mount technology, precise repeatable pads},
   Year 	= {1991} }


% 300) Record # 73
@article{Feldmann94,
   Author	= {Feldmann, Klaus and Sturm, Jürgen},
   Title 	= {Closed loop quality control in printed circuit assembly},
   Journal	= {Components, Packaging, and Manufacturing Technology, Part A, IEEE Transactions on [see also Components, Hybrids, and Manufacturing Technology, IEEE Transactions on]},
   Volume	= {17},
   Number	= {2},
   Pages	= {270-276},
   Abstract	= {Almost 30-50% of fabrication costs in electronics production are caused by testing and repair operations. The reasons for that problem are many. First of all, there is still a lack of knowledge concerning the conditions for robust process control. On the other hand, uncertain specification of product quality causes unnecessary inspection, testing, and repair actions. Thus, a strategy for yield improvement requires strong dedication to causal relationships and specification of process and product quality. In the first step, critical process parameters and their causal effects on product quality must be analyzed. In the second step, once critical process parameter are addressed, control strategies can be developed to assure high first pass yields. This paper gives an overview of ongoing work that has been performed to establish a SMT production line with closed loop quality control via direct process monitoring capabilities and integrated inspection operations. For different inspection tasks, 3-D laser and X-ray inspection is applied. Process parameters as well as test and inspection results are gathered on line. Thus, interrelationships between different process steps, beginning from material inspection, solder paste application, components placement, reflow soldering, and final inspection, can be analyzed. Moreover, variation of process parameters conforming to different approaches to design of experiments (DOE) can be performed while running production. On-line diagnosis of process parameters and inspection results enables a closed loop quality control.},
   Keywords	= {quality control, computerised monitoring, surface mount technology, assembling, production testing, automatic optical inspection, production engineering computing, printed circuit testing, printed circuit manufacture, closed loop quality control, printed circuit assembly, yield improvement, critical process parameters, SMT production line, direct process monitoring capabilities, integrated inspection operations, 3D laser inspection, X-ray inspection, testing, components placement, solder paste application, reflow soldering, online diagnosis, fuzzy logic},
   Year 	= {1994} }


% 301) Record # 71
@inproceedings{,
   Author	= {Donoghue, J.G. and Williams, D.J.},
   Title 	= {Solder paste displacement on component placement},
   BookTitle	= {Electronic Manufacturing Technology Symposium, 1992. IEMT 1992. 12th International},
   Address	= {Loughborough University of Technology},
   Pages	= {177-183},
   Abstract	= {This paper presents the results of a short experimental programme to investigate the displacement of solder paste printed onto the pads of printed circuit boards when surface mount components are placed on these pads. The results show little displacement for "chip' devices but significant displacement of the solder towards adjacent joints for fine pitch devices. This displacement can be up to 30% of the pad width for typically encountered placement forces.},
   Year 	= {1992} }


% 302) Record # 70
@inproceedings{Currie94,
   Author	= {Currie, M.A. and Ekere, N.N. and Mannan, S.H. and Ismail, I.},
   Title 	= {Solder paste characteristics and their effect on fine pitch printing},
   BookTitle	= {Factory 2000 - Advanced Factory Automation, Fourth International Conference on (Conf. Publ. No. 398)},
   Address	= {University Of Salford, Salford, UK},
   Pages	= {552-558},
   Year 	= {1994} }


% 303) Record # 69
@inproceedings{Crida97,
   Author	= {Crida, R.C. and Stoddart, A.J. and Illingworth, J.},
   Title 	= {Using PCA to model shape for process control},
   BookTitle	= {3-D Digital Imaging and Modeling, 1997. Proceedings., International Conference on Recent Advances in},
   Address	= {Centre for Vision, Speech & Signal Process., Surrey Univ., Guildford, UK},
   Pages	= {318-325},
   Abstract	= {Before surface mount components can be placed on a circuit board, it is necessary to print solder paste onto pads. The paste is then melted to make an electrical connection (reflow). A screen printing process is used to print the solder paste onto the board. This is a complicated process with a large number of input parameters. Some of these parameters can be controlled and it is the purpose of this work to investigate control of the process based on measurement of the output shape of the printed paste. The shape is measured using a laser range scanner Principal Component Analysis (PCA) is proposed as a tool for describing solder paste shape with a small number of parameters. This paper discusses the use of PCA for shape analysis in range images as well as explaining how such a description can be incorporated into a process control loop.},
   Keywords	= {process control, solid modelling, laser ranging, surface mount technology, printed circuit manufacture, process control, shape modelling, surface mount components, solder paste, electrical connection, screen printing process, laser range scanner principal component analysis, solder paste shape, shape analysis, process control loop},
   Year 	= {1997} }


% 304) Record # 67
@inproceedings{Burr97,
   Author	= {Burr, D.},
   Title 	= {Solder paste inspection: process control for defect reduction},
   BookTitle	= {Test Conference, 1997. Proceedings., International},
   Address	= {CyberOpt. Corp., USA},
   Pages	= {1036},
   Abstract	= {As quality control for SMT electronics assembly shifts from final inspection/final test to production line monitoring and process control, there is a greater emphasis on post-print solder paste inspection as a means of reducing the number of defects appearing on finished boards. Automatic post-print inspection systems provide operators with the continuous information required to implement in-line continuous process control, identifying out-of-spec trends so that printing problems can be corrected before defective boards are produced.The later a defect is caught, the more expensive it is to repair, so catching a defect early in the process is inherently cheaper. Correcting a defect after reflow produces a more brittle joint and increases risk of fieldfailure. Therefore, finding a defect before reflow is an opportunity to save money and increase reliability. A defect found early in the process should not be viewed as a penalty, but rather an opportunity for savings The “1OX Rule” is a commonly-accepted quick formula for estimating the cost of a defect or failure at each stage in the process:The later a defect is caught, the more expensive it isPrint Failure      $    .50After Reflow      $   5.00In-Circuit Test   $  50.00Field Failure     $ 500.00},
   Keywords	= {printed circuit manufacture, surface mount technology, printed circuit testing, process control, soldering, inspection, economics, quality control, quality control, SMT electronics assembly, defect reduction, process control, production line monitoring, automatic post-print inspection, in-line continuous process control, defective boards, PCB testing, Volume: Single best predictor},
   Year 	= {1997} }


% 305) Record # 66
@inproceedings{Brown94,
   Author	= {Brown, H.K. and Martin-Vega, L.A. and Shaw, W.H. and Madry, J.G. and Taylor, C.L.},
   Title 	= {Utilization of sensory feedback during SMT assembly},
   BookTitle	= {Southcon/94. Conference Record},
   Address	= {Florida Inst. of Technol., Melbourne, FL, USA},
   Pages	= {349-352},
   Abstract	= {This paper investigates the insertion of inline sensors into Surface Mount Technology (SMT) production lines for the purpose of improving yield and reducing production costs by elevating the quality level of the product to the six sigma level. Each process step in the assembly process, starting with board loading, through deposition, part placement, and reflow will be discussed for monitoring in real time for deviations. When deviations are detected, feedback can be sent either to operators or the equipment for corrective action thus providing a closed loop SMT assembly process. A study of an SMT assembly line indicates that video surveillance at the beginning of the line can be used to inspect the quality of the Printed Wire Boards (PWBs) before additional processing actions are taken on them. Similar surveillance techniques employed in the deposition stage to ensure that only PWBs with proper solder paste deposition are allowed to continue will be discussed. The parts placement stage provides many opportunities for the placement of inline sensors ranging from inspection of the parts for defects and orientation errors before they are placed to determining their exact position on the PWB after they have been placed. The potential of similar placement monitoring techniques before and after reflow for monitoring this process are explored.},
   Keywords	= {surface mount technology, assembling, circuit optimisation, integrated circuit yield, quality control, reflow soldering, closed loop systems, sensory feedback, SMT assembly, inline sensors, production costs, yield, quality level, six sigma level, process step, assembly process, board loading, part placement, reflow, closed loop process, video surveillance, PWB, solder paste deposition, orientation errors, placement monitoring techniques},
   Year 	= {1994} }


% 306) Record # 65
@inproceedings{Zhen00,
   Author	= {Zhen, He and Ershi, Qi and Zixian, Liu},
   Title 	= {Quality improvement through SPC/DOE in SMT manufacturing},
   BookTitle	= {Management of Innovation and Technology, 2000. ICMIT 2000. Proceedings of the 2000 IEEE International Conference on},
   Address	= {Sch. of Manage., Tianjin Univ., China},
   Volume	= {2},
   Pages	= {855-858},
   Abstract	= {The paper addresses how to analyze and improve process quality in surface mount technology (SMT) manufacturing using multi-vari analysis (MVA), measurement system analysis (MSA), and design of experiment (DOE). The key process parameter (solder paste height) in the printing process has been optimized and defects caused by poor soldering have been reduced. The paper provides a good solution for increasing solderability of surface mount technology manufacturing through joint use of statistical process control (SPC) and DOE.},
   Keywords	= {surface mount technology, statistical process control, quality control, design of experiments, soldering, SMT manufacturing, process quality improvement, surface mount technology, multi-vari analysis, measurement system analysis, design of experiment, process parameter, solder paste height, printing process, poor soldering defects reduction, solderability, statistical process control},
   Year 	= {2000} }


% 307) Record # 64
@inproceedings{Sauer01,
   Author	= {Sauer, W. and Wohlrabe, H.},
   Title 	= {Machine and process capability coefficient of solder paste printers},
   BookTitle	= {Electronics Technology: Concurrent Engineering in Electronic Packaging, 2001. 24th International Spring Seminar on},
   Editor	= {Dumitrache, I. and Svasta, P.},
   Address	= {Dept. of Electr. Eng., Tech. Univ. Dresden, Germany},
   Pages	= {26-31},
   Abstract	= {For manufacturers of assembled boards seeking ISO 9000 certification, a number of requirements are placed on measurement instruments and tooling. This standard requires a system to document and maintain calibration and machine capabilities. One of these problems is the measurement of printing accuracies of solder paste printers. The paper presents: short theoretical overview of machine capabilities; methods of measurement of accuracies (x, y and rotation); recommendations for the calibration of printers; indications for the sources of inaccuracies; practical examples and results.},
   Keywords	= {certification, ISO standards, calibration, measurement standards, soldering, assembling, printed circuit manufacture, process capability coefficient, machine capability coefficient, solder paste printers, assembled board manufacture, ISO 9000 certification, measurement instruments, tooling, calibration, documentation, machine capabilities, printing accuracy measurement, accuracy measurement methods, printer calibration, inaccuracy source indications},
   Year 	= {2001} }


% 308) Record # 63
@inproceedings{,
   Author	= {Rautakoura, T. and Tuominen, A.},
   Title 	= {Web-based research of solder paste printing quality},
   BookTitle	= {Electronic Materials and Packaging, 2001. EMAP 2001.  Advances in},
   Address	= {University of Vaasa},
   Pages	= {79-83},
   Year 	= {2001} }


% 309) Record # 62
@inproceedings{,
   Author	= {Peck, D.J.},
   Title 	= {Solder paste in SMT: a training perspective},
   BookTitle	= {Electro 98. Professional Program Proceedings},
   Address	= {Adv. Electron. Interconnect Inc., USA},
   Pages	= {1-14},
   Abstract	= {An effective stencil printing operation is essential for quality SMT assembly. This can be achieved only by thorough operator training in all aspects of the printing process. The operator must have a working knowledge of solder paste, paste quality testing, and handling. He/she must understand all aspects of printer setup, and the effects of setup deficiencies. Postprint inspection by the operator is critical in verifying print quality, as is maintenance of effective SPC monitoring.},
   Keywords	= {soldering, surface mount technology, training, printing, inspection, quality control, statistical process control, assembling, printed circuit manufacture, solder paste, SMT, training perspective, stencil printing operation, operator training, printing process, paste quality testing, paste handling, printer setup, setup deficiencies, postprint inspection, print quality, SPC monitoring, General Recomendations},
   Year 	= {1998} }


% 310) Record # 61
@inproceedings{Nguty99,
   Author	= {Nguty, T.A. and Ekere, N.N. and Adebayo, A.},
   Title 	= {Correlating solder paste composition with stencil printing performance},
   BookTitle	= {Electronics Manufacturing Technology Symposium, 1999. Twenty-Fourth IEEE/CPMT},
   Address	= {Dept. of Aeronaut. Mech. & Manuf. Eng., Salford Univ., UK},
   Pages	= {304-312},
   Abstract	= {Soldering technologies continue to evolve, particularly in the area of solder pastes used in SMD reflow soldering. Solder pastes typically consist of solder alloy powder, flux, viscosity control agents, and a solvent system. By varying solder particle size, distribution and shape, as well as the other constituent materials, solder paste rheology and printing performance can be controlled. As PCB pad and component lead sizes reduce to meet ultra-fine pitch and flip-chip assembly requirements, most paste suppliers have opted for smaller powder particle sizes and new rheology modifier formulations. Successful assembly at these small-scale geometries requires deposition of small and consistent paste deposits from pad to pad, and from board to board. Two primary mechanisms dominate paste printing at this chip-scale geometry: paste transfer into stencil apertures, and paste release from the apertures on to PCB pads, i.e. paste flow behaviour is crucial in defining printing performance. Solder paste flow properties primarily depend on their chemical and physical structure, and hence composition. In this paper, we study the rheological profile of various paste formulations, and how this can be used to provide better understanding of composition effects on stencil printing performance. Pastes for ultra-fine pitch and flip chip applications were studied via a wide range of rheological tests, including the creep recovery test to determine paste slump characteristics and the oscillatory test to determine visco-elastic behaviour required for two critical sub-processes: aperture filling and paste withdrawal.},
   Keywords	= {reflow soldering, surface mount technology, printed circuit manufacture, rheology, viscosity, particle size, recovery-creep, viscoelasticity, printed circuit testing, assembling, flip-chip devices, fine-pitch technology, integrated circuit packaging, creep testing, solder paste composition, stencil printing performance, soldering technology, solder pastes, SMD reflow soldering, solder alloy powder, solder flux, viscosity control agents, solvent system, solder particle size, solder particle distribution, flip-chip assembly, ultra-fine pitch assembly, powder particle sizes, rheology modifier formulations, assembly, solder paste flow properties, paste printing, chip-scale geometry, physical structure, chemical structure, stencil apertures, paste release, PCB pads, powder particle size, consistent paste deposits, flip chip applications, ultra-fine pitch applications, rheological profile, solder paste formulations, paste composition effects, rheological tests, creep recovery test, paste slump characteristics, oscillatory test, visco-elastic behaviour, aperture filling, paste withdrawal, equations},
   Year 	= {1999} }


% 311) Record # 58
@inproceedings{Lotfi98,
   Author	= {Lotfi, A. and Howarth, M.},
   Title 	= {An intelligent closed-loop control of solder paste stencil printing},
   BookTitle	= {Electronics Manufacturing Technology Symposium, 1998. Twenty-Third IEEE/CPMT},
   Address	= {Dept. of Mech. & Manuf. Eng., Nottingham Trent Univ., UK},
   Pages	= {87-91},
   Abstract	= {We have introduced an automated learning closed-loop control scheme for the solder paste stencil printing stage of SMT. It reduces the number of board failures due to inadequate regulation of the printing parameters. Learning is used to compensate for a lack of a priori design information by exploiting empirical information that is gained experimentally.},
   Keywords	= {closed loop systems, process control, intelligent control, learning (artificial intelligence), soldering, surface mount technology, printed circuit manufacture, assembling, circuit reliability, intelligent closed-loop control, solder paste stencil printing, automated learning closed-loop control scheme, SMT, board failures, inadequate printing parameter regulation, printing parameters, learning, a priori design information, empirical information, fuzzy logic, forgetting factor, genetic algorithms},
   Year 	= {1998} }


% 312) Record # 57
@article{,
   Author	= {Lin, Kwang-Lung and Yao, S.},
   Title 	= {Solder thickness variation with respect to soldering parameters},
   Journal	= {Components and Packaging Technologies, IEEE Transactions on [see also Components, Packaging and Manufacturing Technology, Part A: Packaging Technologies, IEEE Transactions on]},
   Volume	= {23},
   Number	= {4},
   Pages	= {661-664},
   Abstract	= {This study investigated the growth behavior of solder interconnect on solder bonding pad. The solder thickness was investigated with respect to parameters including bonding pad area, reflow temperature, solder paste volume, loading, and die size (metallization area). Solder thickness was found to have a maximum value with respect to the ratio of solder paste volume to pad size. Loading and the reflow temperature showed no effect on solder thickness. An enlargement in metallization area reduces the solder thickness, while greater solder paste volume increases the solder thickness.The solder thickness obtained from the reflow of solder paste is related to the solder pad area on the substrate, as well as to the metallization area of the die. A maximum solder thickness is achieved with respect to the ratio of solder paste volume/pad area, and the solder thickness increases linearly with respect to increasing ratio below 0.004. The three factors that are important in controlling the solder thickness are pad area, solder volume, and die size (metallization area), rather than reflow temperature or die weight.},
   Keywords	= {reflow soldering, integrated circuit packaging, lead bonding, solder thickness variation, soldering parameters, growth behavior, bonding pad area, reflow temperature, solder paste volume, loading, die size, metallization area},
   Year 	= {2000} }


% 313) Record # 56
@article{,
   Author	= {Kloeser, J. and Heinricht, K. and Kutzner, K. and Jung, E. and Ostmann, A. and Reichl, H.},
   Title 	= {Fine pitch stencil printing of Sn/Pb and lead free solders for flip chip technology},
   Journal	= {Components, Packaging, and Manufacturing Technology, Part C, IEEE Transactions on [see also Components, Hybrids, and Manufacturing Technology, IEEE Transactions on]},
   Volume	= {21},
   Number	= {1},
   Pages	= {41-50},
   Abstract	= {This paper presents a flip chip technology based on an electroless Ni/Au bumping process which has been developed by IZM/TUB. Nickel bumps offer a surface with very good suitability for flip chip soldering. In the following, an interconnection method is described which uses ultra fine pitch stencil printing of solder paste on wafers, ceramic, and organic substrates. The eutectic Pb/Sn solder alloy is by far the most commonly used solder in industry. Facing the ecological challenge and federal legislation the paste suppliers are developing lead free solder pastes. Due to the fact that the variety of solder pastes is still growing it is necessary to find an ideal alloy for a specific application. Therefore, in comparison to eutectic Sn/Pb solder different alloys, e.g., Bi/Sn, Sn/Bi/Cu, Sn/Ag, Sn/Cu, Au/Sn are investigated in this paper. In the first part of this paper a low cost flip chip technology based on chemical Ni/Au bumping and solder printing is presented. For this the basic process steps and key aspects are described in detail. The experimental results of an ultra fine pitch technique on wafers and on substrates are shown as well. The second part of this paper presents a comparison of the properties of different solder pastes concerning the usability for flip chip technology. For this, flip chip soldering using dies with Ni/Au bumps was performed on ceramic and FR-4 substrates. The quality of the flip chip joints were investigated by metallurgical cross sections and electrical and mechanical measurements. Finally, the reliability results of these joints after thermal cycling are presented.},
   Keywords	= {flip-chip devices, soldering, fine-pitch technology, electroless deposited coatings, tin alloys, lead alloys, lead free solder paste, flip chip technology, electroless Ni/Au bumping, interconnection, ultra fine pitch stencil printing, wafer, ceramic substrate, organic substrate, eutectic Pb/Sn solder, ecology, FR-4 substrate, metallurgical cross section, reliability, thermal cycling, chemical bumping, Ni-Au, Sn-Pb, Bi-Sn, Sn-Bi-Cu, Sn-Ag, Sn-Cu, Au-Sn},
   Year 	= {1998} }


% 314) Record # 55
@inproceedings{,
   Author	= {Kamen, E. and Goldstein, A. and Creveling, D. and Sahinci, E. and Xiong, Z.},
   Title 	= {Analysis of factors affecting component placement accuracy in SMT electronics assembly},
   BookTitle	= {Electronics Manufacturing Technology Symposium, 1998. Twenty-Third IEEE/CPMT},
   Address	= {Center for Manuf. Res., Georgia Inst. of Technol., Atlanta, GA, USA},
   Pages	= {50-57},
   Abstract	= {In order to minimize the frequency of defects in SMT assembly it is necessary to understand the possible sources of errors that can lead to defects. In this paper, we consider various factors that may affect placement accuracy. Results based on experimental data are given on the relationship between placement accuracy and solder paste brick parameters, feeder location, component type, and z-axis placement force.},
   Keywords	= {surface mount technology, printed circuit manufacture, assembling, circuit reliability, soldering, position control, component placement accuracy factors, SMT electronics assembly, defect frequency minimization, SMT assembly, assembly error sources, placement accuracy, solder paste brick parameters, feeder location, component type, z-axis placement force},
   Year 	= {1998} }


% 315) Record # 54
@inproceedings{Howarth+Lotfi99,
   Author	= {Howarth, M. and Lotfi, A.},
   Title 	= {Adaptive fuzzy control of solder paste printing: the identification of deposit defects},
   BookTitle	= {Electronics Manufacturing Technology Symposium, 1999. Twenty-Fourth IEEE/CPMT},
   Address	= {Dept. of Mech. & Manuf. Eng., Nottingham Trent Univ., UK},
   Pages	= {102-107},
   Abstract	= {This paper presents the use of fuzzy logic to implement feature extraction and defect classification of an adaptive fuzzy control algorithm for the control of the solder paste stencil printing stage of surface mount printed circuit board (PCB) assembly. Experimental results are presented to illustrate the capability of the algorithm.},
   Keywords	= {surface mount technology, printed circuit manufacture, assembling, soldering, adaptive control, fuzzy control, fuzzy logic, circuit reliability, fault diagnosis, feature extraction, process control, adaptive fuzzy control, solder paste printing, deposit defect identification, fuzzy logic, feature extraction, defect classification, adaptive fuzzy control algorithm, solder paste stencil printing control, solder paste stencil printing stage, surface mount PCB assembly, surface mount printed circuit board assembly},
   Year 	= {1999} }


% 316) Record # 53
@article{Ho+Xie01,
   Author	= {Ho, S.L. and Xie, M. and Tang, L.C. and Xu, K. and Goh, T.N.},
   Title 	= {Neural network modeling with confidence bounds: a case study on the solder paste deposition process},
   Journal	= {Electronics Packaging Manufacturing, IEEE Transactions on [see also Components, Packaging and Manufacturing Technology, Part C: Manufacturing, IEEE Transactons on]},
   Volume	= {24},
   Number	= {4},
   Pages	= {323-332},
   Abstract	= {The formation of reliable solder joints in electronic assemblies is a critical issue in surface mount manufacturing. Stringent control is placed on the solder paste deposition process to minimize soldering defects and achieve high assembly yield. Time series process modeling of the solder paste quality characteristics using neural networks (NN) is a promising approach that complements traditional control charting schemes deployed on-line. We present the study of building a multilayer feedforward neural network for monitoring the solder paste deposition process performance. Modeling via neural networks provides not only useful insights in the process dynamics, it also allows forecasts of future process behavior to be made. Data measurements collected on ball grid array (BGA) and quad flat pack (QFP) packages are used to illustrate the NN technique and the forecast accuracies of the models are summarized. Furthermore, in order to quantify the errors associated with the forecasted point estimates, asymptotically valid prediction intervals are computed using nonlinear regression. Simulation results showed that the prediction intervals constructed give reasonably satisfactory coverage percentages as compared to the nominal confidence levels. Process control using NN with confidence bounds provides more quality information on the performance of the deposition process for better decision making and continuous improvement.The drive toward product miniaturization and the concomitant decrease in component lead pitch has increased the importance of monitoring the amount of printed solder paste in the deposition process. In this paper, we presented the study of NN in modeling and predicting the behavior of solder paste deposition process. This approach can lead to better decision making and continuous improvement. Results from our studies showed that the feed-forward NN architecture exhibits low prediction errors, and hence is a viable alternative compared to physical models. Furthermore, the use of prediction intervals is proposed, in addition to the forecasted point estimates. We demonstrated that constructing the intervals via nonlinear regression techniques showed reasonably good coverage probabilities. Due to this forecasting capability, integrating the neural models with confidence bounds for continuous process monitoring in a close loop framework indeed provides quality information on the performance of the deposition process. The time series solder paste height data can be learned by the NN to detect occurrence of decreasing trend. Hence, early detection of process deterioration is made possible and timely remedial actions can be initiated.The drive toward product miniaturization and the concomitant decrease in component lead pitch has increased the importance of monitoring the amount of printed solder paste in the deposition process. In this paper, we presented the study of NN in modeling and predicting the behavior of solder paste deposition process. This approach can lead to better decision making and continuous improvement. Results from our studies showed that the feed-forward NN architecture exhibits low prediction errors, and hence is a viable alternative compared to physical models. Furthermore, the use of prediction intervals is proposed, in addition to the forecasted point estimates. We demonstrated that constructing the intervals via nonlinear regression techniques showed reasonably good coverage probabilities. Due to this forecasting capability, integrating the neural models with confidence bounds for continuous process monitoring in a close loop framework indeed provides quality information on the performance of the deposition process. The time series solder paste height data can be learned by the NN to detect occurrence of decreasing trend. Hence, early detection of process deterioration is made possible and timely remedial actions can be initiated.},
   Keywords	= {reflow soldering, multilayer perceptrons, ball grid arrays, packaging, statistical analysis, surface mount technology, process monitoring, printed circuit manufacture, feedforward neural nets, neural network modeling, confidence bounds, solder paste deposition process, electronic assemblies, surface mount manufacturing, soldering defects, time series process modeling, multilayer feedforward neural network, process dynamics, process behavior, ball grid array, quad flat pack, prediction intervals, nonlinear regression, defects related SPP},
   Year 	= {2001} }


% 317) Record # 52
@article{He98,
   Author	= {He, Da and Ekere, N.N. and Currie, M.A.},
   Title 	= {The behavior of solder pastes in stencil printing with vibrating squeegee},
   Journal	= {Components, Packaging, and Manufacturing Technology, Part C, IEEE Transactions on [see also Components, Hybrids, and Manufacturing Technology, IEEE Transactions on]},
   Volume	= {21},
   Number	= {4},
   Pages	= {317-324},
   Abstract	= {Stencil printing of solder paste with sinusoidally vibrated squeegee is a new technique developed in recent years used for the assembly of printed circuit boards (PCB's) in surface mount technology (SMT). Understanding of the behavior of solder paste under the action of vibrating squeegee is needed to optimize the process parameters. Two vibration experiments on solder paste were conducted. In the first experiment, a prototype of vibrating squeegee system was used to simulate the printing process and in the second experiment paste samples were packed in a cylindrical container which was horizontally vibrated. Experimental results validate the prior theoretical predictions. Suitable ranges of vibration parameters were found.The main points of the theoretical analysis of the process of stencil printing of solder paste using a vibrating squeegee were briefly introduced in this paper. To validate the theoretical prediction two experiments were conducted. The first experiment simulated the stencil printing of solder paste using a vibrating squeegee. Experimental results demonstrated that the application of a vibrating squeegee can generate a liquid rich layer at the squeegee blade and paste roll interface. This liquid rich layer acts as a lubricational agent between the blade and the paste roll that can reduce the squeegee blade resistance on the paste roll. Empirical evidence has shown that a good paste roll is essential for aperture filling and emptying, and thus more consistent deposits on the pads of a substrate. The application of the vibrating squeegee can also help to reduce the potential for the paste roll to stick on the squeegee blade at the end of a printing stroke. For paste sample I used in this experiment, the suitable range of the vibration frequency is from 80–200 Hz, the suitable range of the amplitude is from 0.1–0.37 mm. In the suitable ranges, the effect of application of high frequency and small amplitude is more significant than otherwise.In the second experiment solder paste sample was vibrated inside a cylindrical container that, in some extent, could reflect the response of paste packed inside apertures to the vibration of the squeegee. Experimental results showed that under vibration a liquid rich layer is generated around the container wall, which implies that vibration may help the transfer of paste from apertures to substrate, thus reducing clogging defects. Microscope observation showed that under vibration the arrangement of solder particles is more uniform than that without vibration. Uniform arrangement of solder particles may reduce the bulk viscosity because of the reduction of lubricational forces among neighboring particles. The use of the expired paste, sample II, in this study may suggest that solder pastes with high metal loads can be used in stencil printing with a vibrating squeegee. Pastes with high metal load can maintain deposit resolutions and reduce bridging defects.},
   Keywords	= {reflow soldering, printing, printed circuit manufacture, assembling, surface mount technology, solder pastes, stencil printing, vibrating squeegee, printed circuit boards, assembly, surface mount technology, process parameters, printing process, cylindrical container, vibration parameters},
   Year 	= {1998} }


% 318) Record # 51
@article{Ekere01,
   Author	= {Ekere, N.N. and He, D. and Cai, L.},
   Title 	= {The influence of wall slip in the measurement of solder paste viscosity},
   Journal	= {Components and Packaging Technologies, IEEE Transactions on [see also Components, Packaging and Manufacturing Technology, Part A: Packaging Technologies, IEEE Transactions on]},
   Volume	= {24},
   Number	= {3},
   Pages	= {468-473},
   Abstract	= {The wall slip phenomena is known to have a significant effect on the measurement of the viscosity of dense suspensions. In the measurement of the viscosity of solder pastes the effect of wall slip is such that the measured viscosity (also called the apparent viscosity) is much lower than the true viscosity of the paste. Therefore, correction needs to be applied to the measured viscosity in order to obtain the true viscosity of the solder paste. In this paper, we present work on the modeling of the influence of wall slip on viscosity measurement, and a model for predicting the true viscosity based on measurements using parallel plate viscometer. The apparent viscosity values measured at two different plate gaps, but at the same applied shear rate (also called the apparent shear rate), is used for predicting the true viscosity, the wall slip velocity and the thickness of the boundary slip layer. The model was validated using results from solder paste samples measured at three different plate gaps (H=0.5 mm, 1.0 mm and 1.5 mm). Our results show that the predicted values of the true viscosity using the data measured at any two gaps are in reasonably good agreement. The results also show that the influence of the wall slip is significant and that the ratio of the predicted viscosity to the apparent viscosity decreases with increasing apparent shear rate.A model for predicting the true viscosity of solder pastes has been presented in this paper. The apparent viscosities measured at different gaps, but at the same applied shear rate was used for predicting the true viscosity, the wall slip velocity and the thickness of the boundary layer. The model was validated by viscosity measurements on a solder paste. Results showed that the predicted values for the true viscosity using the data measured at any two gaps are in reasonably good agreement. Our measurements and predicted true viscosity values also showed that, first, as the apparent shear rate increases the slip velocity increases; whilst the ratio of the true viscosity to the apparent viscosity decreases. Secondly, at a small gap the influence of the wall slip on the viscosity measurement is more significant than that at a larger gap. For solder paste with solid volume fraction phi=0.5, the thickness of the slip layer was estimated in the range of 0.15a to 0.19a. These results are in good agreement with those reported by other workers. The model presented in this paper has very wide applicability, and can also be used for correcting for the effect of wall slip in viscosity measurements for other suspensions such as conductive adhesives and under-fills used in the assembly of electronic devices.},
   Keywords	= {reflow soldering, surface mount technology, printed circuit manufacture, slip flow, viscometers, wall slip, solder paste viscosity, dense suspensions, apparent viscosity, parallel plate viscometer, plate gaps, shear rate, boundary slip layer, 0.5 to 1.5 mm},
   Year 	= {2001} }


% 319) Record # 50
@inproceedings{,
   Author	= {Chin, Y.T. and Khor, C.K. and Sow, H.P. and Ooi, S.J. and Tan, H.B.},
   Title 	= {Breakthrough ball attach technology by introducing solder paste screen printing},
   BookTitle	= {Electronic Components and Technology Conference, 2001. Proceedings., 51st},
   Address	= {Intel Products (M) Sdn Bhd, Kedah Darulaman, Malaysia},
   Pages	= {198-202},
   Abstract	= {Present methods of attaching solder balls to ball grid array (BGA) package is through placing flux and pre-formed solder ball to substrate followed by reflow process. In the ever-moving electronic market, low cost and faster units per hour processing provides competitive edge in the manufacturing technology. Screen ball printing (BP) to form BGA balls provides an innovative processing solution to overcome the costly conventional processing method. The key challenges to this project are to fulfill specified ball dimension and yields with a comparable quality and reliability performance to the current ball attach process. The challenge associated with a print and reflow process is the requirement to print very high amount of solder paste volume on each pad to achieve specified ball height after reflow. Yield loss due to this process are related to solder ball bridging and monster ball formation. Defects will be aggravated on tight pitch printing application. This paper will discuss some of the challenges and solution for this technology.},
   Keywords	= {ball grid arrays, reflow soldering, ball attach technology, solder paste screen printing, ball grid array package, screen ball printing, electronic manufacturing technology, reflow process},
   Year 	= {2001} }


% 320) Record # 49
@article{Venka95,
   Author	= {Venkateswaran, S. and Srihari, K. and Adriance, J.H. and Westby, G.R.},
   Title 	= {A software system for the process control and trouble shooting of solder paste stencil printing},
   Journal	= {Surface Mount International},
   Pages	= {713-179},
   Year 	= {1995} }


% 321) Record # 47
@inproceedings{Pan99,
   Author	= {Pan, Jianbiao and Tonkay, G.L. and Storer, R.H. and Sallade, R.M. and Leandri, D.J.},
   Title 	= {Critical variables of solder paste stencil printing for micro-BGA and fine pitch QFP},
   BookTitle	= {Electronics Manufacturing Technology Symposium, 1999. Twenty-Fourth IEEE/CPMT},
   Address	= {Dept. of Ind. & Manuf. Syst. Eng., Lehigh Univ., Bethlehem, PA, USA},
   Pages	= {94-101},
   Abstract	= {Stencil printing continues to be the dominant method of solder deposition in high volume surface mount assembly. Control of the amount of solder paste deposited is critical for fine pitch and ultra-fine pitch SMT assembly. The process is still not well understood as indicated by the fact that industry reports 52-71% of SMT defects are related to the solder paste stencil printing process. The purpose of this paper is to identify the critical variables that influence the deposited solder paste volume, area, and height. An experiment was conducted to investigate the effects of relevant process parameters on the amount of solder paste deposited for BGAs and QFPs of 5 different pitches, ranging from 0.76 mm (30 mil) to 0.3 mm (12 mil). The effects of aperture size and shape, board finish, stencil thickness, solder type, and print speed were examined. The deposited solder paste was measured by an in-line fully automatic laser-based 3D triangulation solder paste inspection system. Analysis of variance (ANOVA) shows that aperture size and stencil thickness are the two most critical variables. A linear relationship between transfer ratio (defined as the ratio of deposited paste volume to stencil aperture volume) and area ratio (defined as the ratio of the area of the aperture opening to the area of the aperture wall) is proposed. Analysis indicates that proper stencil thickness selection is the key to controlling the amount of solder paste deposited and that the selection of maximum stencil thickness should be based on the area ratio. The experimental results are shown to be consistent with a theoretical model, which is also described.},
   Keywords	= {integrated circuit packaging, ball grid arrays, soldering, fine-pitch technology, surface mount technology, assembling, automatic optical inspection, integrated circuit interconnections, solder paste stencil printing, micro-BGA, fine pitch QFP, solder deposition, surface mount assembly, solder paste, fine pitch SMT assembly, ultra-fine pitch SMT assembly, SMT defects, solder paste stencil printing process, critical variables, solder paste volume, solder paste area, solder paste height, process parameters, BGAs, QFPs, package pitch, aperture size, aperture shape, board finish, stencil thickness, solder type, print speed, deposited solder paste, automatic laser-based 3D triangulation solder paste inspection system, analysis of variance, ANOVA, transfer ratio, deposited paste volume, stencil aperture volume, aperture opening area, aperture wall area, stencil thickness selection, SPP related defects, Critical Variables, ANOVA},
   Year 	= {1999} }


% 322) Record # 46
@inproceedings{Nguty00,
   Author	= {Nguty, T.A. and Budiman, S. and Rajkumar, D. and Solomon, R. and Ekere, N.N. and Currie, M.A.},
   Title 	= {Understanding the process window for printing lead-free solder pastes},
   BookTitle	= {Electronic Components and Technology Conference, 2000. 2000 Proceedings. 50th},
   Address	= {Electron. Manuf. Eng. Res. Group, Salford Univ., UK},
   Pages	= {1426-1435},
   Abstract	= {Solder paste is primarily used as a bonding medium for surface mount assemblies (SMA) in the electronics industry. The solder paste is typically deposited using the stencil printing process. The stencil printing of solder paste is a very important and critical stage in the reflow soldering of surface mount devices. A high proportion of all SMA defects is related to the stencil printing process. This is likely to continue with the drive towards the introduction of lead-free solder pastes. Much work is continuing on the metallurgical properties of these lead-free solders, including solder joint strength and material compatibility. However, the initial challenge for the new Pb-free formulations is in achieving repeatable solder deposit from print to print and from pad to pad. To meet this challenge, new formulations in flux medium are now being developed. For a smooth transition to Pb-free soldering formulations, a proper understanding of the printing performance of the new solder pastes is necessary. The key parameters that affect solder paste printing have been identified and the subject of numerous studies. In lead-free solder paste, the replacement of lead with other elements (including Bismuth, Copper) changes the density of this dense suspension (solder paste). In this paper, we investigate the effects of the printer parameters, i.e. squeegee speed and pressure (defined as the process window) on the printing performance of a variety of lead-free solder pastes. A three-level design of experiment on these factors (pressure and speed) was used. Comparisons will be presented with lead-rich solder pastes. The metal content of the lead-free solders had a significant effect of the on the process window.},
   Keywords	= {Reflow soldering, Environmental factors, Surface mount technology, Design of experiments, process window, lead-free solder paste, electronic assembly, stencil printing, reflow soldering, surface mount device, design of experiments, defects related SPP},
   Year 	= {2000} }


% 323) Record # 45
@inproceedings{Nguty98,
   Author	= {Nguty, T.A. and Riedlin, M.H.A. and Ekere, N.N.},
   Title 	= {Evaluation of process parameters for flip chip stencil printing},
   BookTitle	= {Electronics Manufacturing Technology Symposium, 1998. Twenty-Third IEEE/CPMT},
   Address	= {Dept. of Aeronaut. Mech. & Manuf. Eng., Salford Univ., UK},
   Pages	= {206-216},
   Abstract	= {There is a great deal of interest in solder paste printing in flip chip assembly. The advantages of this process are low cost and high throughput. However, to meet this challenge there is a need to evaluate the stencil printing process parameters. These parameters can be divided into printer parameters, stencil parameters, environmental parameters, and solder paste parameters. The parameters evaluated in this paper are the stencil and solder paste parameters. Several different stencils with various shapes, sizes and pitches were investigated; these dimensions determine the type of solder paste that can be printed. In this paper, we address the need for new paste formulation characterisation, and present a procedure for evaluating solder pastes developed for flip chip application via the stencil printing process. Rheological measurements are used to correlate solder paste behaviour to stencil printing process performance. Fundamental procedures used in industry for characterisation in shear conditions include rheograms (flow curves), thixotropic index and single point viscosity measurements. We show how viscosity changes can be quantified. Viscosity measurements were carried out on a controlled stress-strain Reologica StressTech rheometer with parallel plate geometry. We also report on solder paste creep/recovery properties and how they can be correlated to slump. To correlate solder paste rheological properties to stencil printing behaviour, several printing tests were carried out. These tests can help define the process window for any given flip chip application, in terms of limiting pitch size, pad size and minimum pad gap.},
   Keywords	= {flip-chip devices, microassembling, soldering, rheology, viscosity, particle size, integrated circuit packaging, integrated circuit testing, design of experiments, creep, recovery, flip chip stencil printing process parameters, solder paste printing, flip chip assembly, process throughput, process cost, stencil printing process parameters, printer parameters, stencil parameters, environmental parameters, solder paste parameters, stencil shape, stencil size, stencil pitch, solder paste, paste formulation characterisation, flip chip application, stencil printing process, rheological measurements, solder paste behaviour, stencil printing process performance, shear conditions, rheograms, flow curves, thixotropic index, single point viscosity measurements, viscosity, viscosity measurements, controlled stress-strain Reologica StressTech rheometer, parallel plate geometry, solder paste creep, solder paste recovery, solder paste slump, solder paste rheological properties, stencil printing behaviour, printing tests, process window, limiting pitch size, pad size, minimum pad gap, experimental design},
   Year 	= {1998} }


% 324) Record # 44
@inproceedings{Morad00,
   Author	= {Morad, N. and Yii, Hee Kim and Hitam, M.S. and Lim, Chee Peng},
   Title 	= {Development of an intelligent system for the solder paste printing process},
   BookTitle	= {TENCON 2000. Proceedings},
   Address	= {Sch. of Ind. Technol., Univ. Sains Malaysia, Penang, Malaysia},
   Volume	= {3},
   Pages	= {479-483},
   Abstract	= {A neurogenetic-based hybrid framework is developed where the main components within the framework are artificial neural networks (ANNs) and genetic algorithms (GAs). The investigation covers a mode of combination or hybridisation between the two components that is called task hybridisation. The combination between ANNs and GAs using task hybridisation leads to the development of a hybrid multilayer feedforward network, trained using supervised learning. This paper discusses the GA method used to optimize the process parameters, using the ANN developed as the process mode, in a solder paste printing process, which is part of the process in the surface mount technology (SMT) method. The results obtained showed that the GA-based optimization method works well under various optimization criteria.},
   Keywords	= {printing, surface mount technology, feedforward neural nets, genetic algorithms, learning (artificial intelligence), electronic engineering computing, process control, neurocontrollers, optimal control, intelligent system, solder paste printing process, neurogenetic-based hybrid framework, artificial neural networks, genetic algorithms, task hybridisation, hybrid multilayer feedforward network training, supervised learning, process parameter optimization, optimization criteria, multi-objective optimization, surface mount technology},
   Year 	= {2000} }


% 325) Record # 43
@inproceedings{,
   Author	= {Manessis, D. and Whitmore, M. and Adriance, J.H. and Westby, G.R.},
   Title 	= {A characterization study of direct imaging technique for stencil printing of thick boards (0.125") in the alternative assembly and reflow technology (AART) or pin-in-paste process},
   BookTitle	= {Electronics Manufacturing Technology Symposium, 1998. Twenty-Third IEEE/CPMT},
   Address	= {Surface Mount Technol. Lab., Universal Instrum. Corp., Binghamton, NY, USA},
   Pages	= {92-99},
   Abstract	= {Stencil printing poses significant challenges in the successful implementation of the alternative assembly and reflow technology (AART) or pin-in-paste process for thick (0.125") boards. When the AART process is used, it is extremely important to deposit adequate volumes of solder paste in the plated through holes (PTHs). In some cases, adequate amounts of solder paste cannot be deposited into the PTH with the conventional stencil printing method that uses a squeegee. Therefore, alternate techniques must be used to meet the solder paste volume requirements for thick boards. The "ProFlow direct imaging" system is a unique method of stencil printing. It is a viable, if not better, alternative to the traditional squeegee-solder paste system. The "ProFlow" system consists of a pressure application mechanism that exerts a vertical force on an enclosed volume of solder paste. This research characterized the "ProFlow" system for the stencil printing of thick boards. Three PTH diameters were considered on the board: 35, 37 and 39 mils. The effect of the significant variables in the "ProFlow" system, such as transfer pressure and print speed, on hole fill and printability was systematically investigated. Also, the role of the "ProFlow" system's wiper pressure on the stencil printing process was examined. Thick boards were assembled with surface mount as well as through hole components to validate the applicability of the "ProFlow" system to the AART process.},
   Keywords	= {printed circuit manufacture, surface mount technology, assembling, reflow soldering, printed circuit testing, direct imaging technique, stencil printing, thick boards, alternative assembly/reflow technology process, pin-in-paste process, AART process, solder paste volume, plated through holes, PTHs, solder paste, solder paste volume requirements, ProFlow direct imaging system, squeegee-solder paste system, pressure application mechanism, enclosed solder paste volume, vertical force, PTH diameter, ProFlow system variables, transfer pressure, print speed, hole fill, printability, ProFlow system wiper pressure, stencil printing process, surface mount components, through hole components, 0.125 in, 35 mil, 37 mil, 39 mil, +stencil},
   Year 	= {1998} }


% 326) Record # 42
@article{,
   Author	= {Li, L. and Thompson, P.},
   Title 	= {Stencil printing process development for flip chip interconnect},
   Journal	= {Electronics Packaging Manufacturing, IEEE Transactions on [see also Components, Packaging and Manufacturing Technology, Part C: Manufacturing, IEEE Transactons on]},
   Volume	= {23},
   Number	= {3},
   Pages	= {165-170},
   Abstract	= {Traditional methods for forming flip chip interconnection include evaporation and electroplating. While both options have proven performance records, their costs are too high for many of today's cost-sensitive applications. Motorola's Interconnect Systems Laboratory (ISL) developed a low cost flip chip interconnect alternative, which electroless plates Ni/Au as the under bump metallurgy (UBM), deposits solder paste using a stencil or photoresist mask, and reflows the paste to form solder bumps. This paper is focused on the stencil print process development for wafer solder bumping. Solder paste selection, characterization, stencil design, and process parameter optimizations are critical factors for successful fine pitch stencil printing. Fine mesh eutectic solder pastes (Type 5: -500+635, Type 6: -635) with different flux vehicles were evaluated for printability and reflow studies. Paste and flux modification and co-development with vendors for this specific application were conducted. An optimal paste, with specified viscosity and desired print, reflow, and cleaning behavior, was developed. Wafer stencil design rules were established to deposit the right amount of solder paste to form the required reflowed solder bump height without bridges between pads. Printing and reflow design of experiments were performed to establish the baseline and optimum process parameters. Solder bump characterizations, including bump height and uniformity, composition, shear force, and scanning electron microscope (SEM) bump profile and cross section microstructure analysis, were conducted. Development and characterization results are reported. This stencil print solder bump process is demonstrated on 4, 5, 6, and 8-in device wafers with pitches down to 200 /spl mu/m. Solder bumps are formed on wafers without bridges or missing bumps. Wafer level yield is >95% on die basis. Bump height standard deviation within die is less than 3%, and range is less than 15% of the average bump height. The 63 Sn/37 Pb eutectic-bumped functional device dice were flip chip assembled to test boards with Cu/Ni/Au pad metallization, and underfilled for interconnect reliability studies. All reliability requirements were met.},
   Keywords	= {printing, flip-chip devices, masks, reflow soldering, fine-pitch technology, viscosity, surface cleaning, integrated circuit reliability, integrated circuit yield, integrated circuit interconnections, chip scale packaging, stencil printing process development, flip chip interconnect, cost-sensitive applications, Interconnect Systems Laboratory, Motorola, under bump metallurgy, solder paste, photoresist mask, reflow soldering, process parameter optimizations, fine pitch, flux vehicles, printability, viscosity, cleaning behavior, bump height, bump uniformity, shear force, SEM, cross section microstructure analysis, wafer level yield, interconnect reliability, 4 to 8 in, 200 micron, Ni-Au, SnPb},
   Year 	= {2000} }


% 327) Record # 41
@inproceedings{,
   Author	= {Li, Li and Wiegele, S. and Thompson, P. and Lee, R.},
   Title 	= {Stencil printing process development for low cost flip chip interconnect},
   BookTitle	= {Electronic Components and Technology Conference, 1998. 48th IEEE},
   Address	= {Semicond. Products Sector, Motorola Inc., Tempe, AZ, USA},
   Pages	= {421-426},
   Abstract	= {Traditional methods for forming flip chip interconnection include evaporation and electroplating. While both options have proven performance records, their costs are too high for many of today's cost-sensitive applications. Motorola AISL (Advanced Interconnect Systems Laboratory) developed a low cost flip chip interconnect alternative, which electroless plates Ni/Au as the under bump metallurgy (UBM), deposits solder paste using a stencil or photoresist mask, and reflows the paste to form solder bumps. This paper is focused on the stencil print process development for wafer solder bumping. Solder paste selection, characterization, stencil design, and process parameter optimization are critical factors for successful fine pitch stencil printing. Fine mesh eutectic solder pastes (Type 5: -500+635, Type 6: -635) with different flux vehicles were evaluated for printability and reflow studies. Paste and flux modification and co-development with vendors for this specific application were conducted. An optimal paste, with specified viscosity and desired print, reflow and cleaning behavior, was developed. Wafer stencil design rules were established to deposit the right amount of solder paste to form the required reflowed solder bump height without bridges between pads. Printing and reflow design of experiments were performed to establish the baseline and optimum process parameters. Solder bump characterizations, including bump height and uniformity, composition, shear force, and SEM bump profile and cross section microstructure analysis, were conducted. Development and characterization results are presented.},
   Keywords	= {printing, flip-chip devices, integrated circuit interconnections, reflow soldering, fine-pitch technology, surface cleaning, integrated circuit packaging, stencil printing process development, flip chip interconnect, Motorola AISL, Advanced Interconnect Systems Laboratory, under bump metallurgy, solder paste, wafer solder bumping, process parameter optimization, fine pitch, flux vehicles, printability, flux modification, cleaning behavior, optimum process parameters, bump height, shear force, cross section microstructure analysis},
   Year 	= {1998} }


% 328) Record # 40
@inproceedings{Glinski00,
   Author	= {Glinski, G.P. and Bailey, C. and Pericleous, K.},
   Title 	= {Simulation of the stencil printing process [solder pastes]},
   BookTitle	= {Electronic Materials and Packaging, 2000. (EMAP 2000). International Symposium on},
   Editor	= {Kim, J.K. and Teng, A. and Lee, S-W R.},
   Address	= {Centre for Numerical Modelling and Process Analysis, Greenwich Univ., London, UK},
   Pages	= {364-370},
   Abstract	= {This paper describes the application of advanced computational fluid dynamics (CFD) methods to model the stencil printing process at both macroscopic and microscopic length scales. The solder paste flow is simulated on a macroscopic scale to study flow characteristics of the bulk motion of the whole paste roll as it travels ahead of a squeegee blade. The studies are performed using finite volume CFD methods, treating the paste as a continuum. Constitutive relationships are used with experimentally obtained parameters to represent the nonNewtonian properties of solder pastes. Shear rate and pressure distributions are obtained and applied as boundary conditions for microscopic studies, in which lattice-Boltzmann methods are used to couple the simultaneous solution of the solder particle dynamics and flux flow during aperture filling and stencil withdrawal. Discrete element method (DEM) type algorithms are used to control particle collisions. The simulation results are intended to provide insight into the phenomena which occur during the printing of solder paste in fine-pitch applications.An outline of a number of multi-scale modelling methods have been presented, which are being integrated to study macroscopic and microscopic mechanisms of the solder paste stencil printing process. Finite volume methods have been used to obtain shear rate and pressure data to define boundary conditions of microscale simulations in which coupled solutions of flux flow and solder particle transport are solved simultaneously using Lattice-Boltzmann techniques for the particle-fluid interaction, integrated with discrete element type methods to control particle collisions. The microscopic simulations to date are two- dimensional. Such simulations are beneficial to the development of the methods and code as numerous benchmark cases exist for validation purposes. The modelling of flux flow around spherical solder particles in two dimensions is not realistic since the particles are represented as cylindrical objects. Work is now focused on extending methods to three dimensions and will be validated against appropriate benchmark studies of hydrodynamic forces on spheres. Optimum lattice densities need to be established for efficiency/accuracy trade-off. Full three-dimensional simulations of solder particles in various aperture geometries will follow these studies. Experimental measurement and visualization studies are also planned to validate both the macroscopic and microscopic simulation results.},
   Keywords	= {computational fluid dynamics, soldering, assembling, printed circuit manufacture, electronic engineering computing, flow simulation, fine-pitch technology, finite volume methods, Boltzmann equation, stencil printing process simulation, computational fluid dynamics, CFD methods, stencil printing process, microscopic length scale, macroscopic length scale, solder paste flow, flow characteristics, bulk paste roll motion, squeegee blade, finite volume CFD methods, paste continuum treatment, nonNewtonian properties, solder pastes, shear rate, pressure distribution, boundary conditions, lattice-Boltzmann methods, solder particle dynamics, flux flow, aperture filling, stencil withdrawal, discrete element method type algorithms, particle collision control, fine-pitch applications, solder paste printing},
   Year 	= {2000} }


% 329) Record # 39
@inproceedings{Ekere98,
   Author	= {Ekere, N.N. and He, D. and Riedlin, M.H.A.},
   Title 	= {The viscoelastic characteristics of solder paste under high frequency oscillatory shear},
   BookTitle	= {Electronics Manufacturing Technology Symposium, 1998. Twenty-Third IEEE/CPMT},
   Address	= {Dept. of Aeronaut. Mech. & Manuf. Eng., Salford Univ., UK},
   Pages	= {373-376},
   Abstract	= {In this paper, the viscoelastic characteristics of solder paste under high frequency (50 Hz-90 Hz) oscillatory shear were investigated by oscillatory shear measurements. Measurement results show that the dynamic viscosity of solder paste decreases as the oscillatory frequency increases, which means the oscillation can help to enhance solder paste fluidity. This proves that in a stencil printing process, the application of a vibrating squeegee can help the paste to fill the apertures. Within the oscillatory frequency range, results show that the solder paste loss modulus is much higher than its storage modulus. With shear stress of 500 Pa, the phase shift (/spl zeta/) is around 700, and with shear stress of 1000 Pa it is around 750, so the behaviour of solder paste under oscillatory shear is more like a viscous liquid than a solid. The storage modulus with low shear stress, corresponding to small shear strain, is higher than that with high shear stress, corresponding to large shear strain. This means that the solder paste storage modulus is not only dependent on frequency but is also dependent on shear strain. High oscillatory shear strain can reduce the solder paste deformation recoverability. It suggests that when passing over the apertures, the vibrating squeegee can help to obtain uniform and high solder particle packing density inside the apertures.},
   Keywords	= {elastic moduli, soldering, assembling, printed circuit manufacture, stress analysis, viscosity, viscoelasticity, shear deformation, vibrations, surface mount technology, viscoelastic characteristics, solder paste, high frequency oscillatory shear, oscillatory shear measurements, dynamic viscosity, oscillatory frequency, solder paste fluidity, stencil printing process, vibrating squeegee, solder paste aperture filling, oscillatory frequency range, solder paste loss modulus, shear stress, phase shift, oscillatory shear, viscous liquid, storage modulus, shear strain, solder paste storage modulus, high oscillatory shear strain, solder paste deformation recoverability, solder particle packing density},
   Year 	= {1998} }


% 330) Record # 38
@inproceedings{Ekere95,
   Author	= {Ekere, N.N. and Mannan, S.H. and Currie, M.A.},
   Title 	= {Solder paste printing process modelling map},
   BookTitle	= {Electronic Manufacturing Technology Symposium, 1995, Proceedings of 1995 Japan International, 18th IEEE/CPMT International},
   Address	= {Dept. of Aeronaut., Mech. & Manuf. Eng., Salford Univ., UK},
   Pages	= {137-141},
   Abstract	= {This paper presents work done in the modelling of solder paste printing, a crucial process in the reflow soldering of surface mounted electronic components. The map summarises the results of the experimental observations and theoretical models developed. In the mapping approach developed, information on the process models and modelling technique (including assumptions used), process and equipment parameters, physical sub-processes, process variables, and the process performance in terms of quality and/or defects are represented. The solder paste printing process is modelled as six different interacting sub-processes in the physical sub-processes layer, namely: pre-print paste treatment, squeegee deformation, paste roll in front of the squeegee, aperture filling, aperture emptying and paste slump. The sub-processes are linked together by the properties of the solder paste such as its flow history or theology in terms of the stress/strain history and the viscosity/time graph.},
   Keywords	= {printing, solder paste stencil printing process, modelling map, reflow soldering, surface mounted electronic component, paste treatment, squeegee deformation, paste roll, aperture filling, aperture emptying, paste slump, Critical Variables},
   Year 	= {1995} }


% 331) Record # 37
@inproceedings{,
   Author	= {Cai, Jian and Law, S. and Teng, A. and Chan, P.C.H.},
   Title 	= {Influences of pad shape and solder microstructure on shear force of low cost flip chip bumps},
   BookTitle	= {Electronic Materials and Packaging, 2000. (EMAP 2000). International Symposium on},
   Editor	= {Kim, J.K. and Teng, A. and Lee, S-W R.},
   Address	= {Computer Aided Design & Manuf. Facility, Hong Kong Univ. of Sci. & Technol., China},
   Pages	= {91-98},
   Abstract	= {The bumping process plays a critical role in flip chip technology. A low cost bumping process has been developed using electroless nickel and immersion gold followed by stencil printing. The process flow is described in this paper. The Al pad size is about 100 /spl mu/m in diameter with a pitch of 400 /spl mu/m. Different electroless plating solutions were evaluated and different solder pastes were used to evaluate the stencil printing process. Different pad shapes were also tested for shear strength. Ni studs with no bump material were fabricated to evaluate the electroless process. The shear force test result shows a strength value of 230 MPa for Ni studs. The solder bump after reflow has a diameter of 160 /spl mu/m and a height of 120 /spl mu/m. There is some difference in the shear force test results for different pad shapes. SEM and EDAX results of the fracture surface indicate that the fracture was cohesive or inside the solder. Cross sections showed some intermetallic layers at the interface. A Ni-Sn intermetallic layer and a phosphorus rich layer formed during reflow, which have compositions of Ni/sub 3/Sn/sub 4/ and Ni/sub 3/P respectively. The low cost flip chip samples were subjected to multiple reflows and shear force tests were performed. Fracture surfaces were analysed and failure modes were differentiated.},
   Keywords	= {shear strength, flip-chip devices, integrated circuit packaging, integrated circuit interconnections, integrated circuit metallisation, reflow soldering, microassembling, electroless deposition, crystal growth from solution, scanning electron microscopy, X-ray chemical analysis, mechanical testing, failure analysis, fracture, interface structure, pad shape, solder microstructure, shear force, flip chip bumps, bumping process, flip chip technology, bumping process cost, electroless nickel, immersion gold, stencil printing, process flow, Al pad size, Al pad pitch, electroless plating solutions, solder pastes, stencil printing process, pad shapes, shear strength, Ni studs, bump material, electroless process, shear force test, reflow solder bump, solder bump diameter, solder bump height, SEM, EDAX, fracture surface, cohesive fracture, solder cross sections, interface intermetallic layers, Ni-Sn intermetallic layer, phosphorus rich layer, Ni/sub 3/Sn/sub 4/ layer, Ni/sub 3/P layer, multiple reflows, fracture surfaces, failure modes, 100 micron, 400 micron, 160 micron, 120 micron, Al, Ni-Au, Ni/sub 3/Sn/sub 4/, Ni/sub 3/P},
   Year 	= {2000} }


% 332) Record # 36
@book{,
   Author	= {Guillemin, Ernst A. and Kalman, R. E. and DeClaris, N. and Andersen, Jonny},
   Title 	= {Aspects of network and system theory},
   Publisher	= {Holt Rinehart and Winston},
   Address	= {New York,},
   Keywords	= {Electric networks, Guillemin, Ernst Adolph.},
   Year 	= {1971} }


% 333) Record # 35
@book{,
   Author	= {Kalman, R. E. and Falb, Peter L. and Arbib, Michael A.},
   Title 	= {Topics in mathematical system theory},
   Publisher	= {McGraw-Hill},
   Address	= {New York,},
   Series	= {International series in pure and applied mathematics},
   Keywords	= {System analysis., Machine theory., Algebras, Linear.},
   Year 	= {1969} }


% 334) Record # 34
@book{,
   Author	= {Kamen, Edward W. and United States. National Aeronautics and Space Administration. Scientific and Technical Information Office.},
   Title 	= {Lectures on algebraic system theory : linear systems over rings},
   Publisher	= {National Aeronautics and Space Administration Scientific and Technical Information Office ; for sale by the National Technical Information Service},
   Address	= {Washington, Springfield, Va},
   Series	= {MONTHLY CATALOG NUMBER: gp 79006310
Prepared for Ames Research Center, by Georgia Institute of Technology, under contract A-43119-B.
Issued July 1878.},
   Keywords	= {System theory., Algebras, Linear., Rings (Algebra)},
   Year 	= {1978} }


% 335) Record # 33
@book{,
   Author	= {Kamen, Edward W.},
   Title 	= {Introduction to signals and systems},
   Publisher	= {Macmillan, Collier Macmillan},
   Address	= {New York, London},
   Edition	= {2nd},
   Keywords	= {Signal theory (Telecommunication), System analysis.},
   Year 	= {1990} }


% 336) Record # 32
@book{Kam+Su99,
   Author	= {Kamen, Edward W. and Su, Jonathan},
   Title 	= {Introduction to optimal estimation},
   Publisher	= {Springer},
   Address	= {London ; New York},
   Series	= {Advanced textbooks in control and signal processing},
   Keywords	= {Signal processing., Estimation theory., Mathematical optimization.},
   Year 	= {1999} }


% 337) Record # 31
@book{,
   Author	= {Hero, Alfred O.},
   Title 	= {Statistical Methods for Signal Processing},
   Publisher	= {Course Notes, ECE, Univ. of Michigan-Ann Arbor},
   Year 	= {2002} }


% 338) Record # 30
@book{Gol+VL96,
   Author	= {Golub, Gene H. and Van Loan, Charles F.},
   Title 	= {Matrix computations},
   Publisher	= {Johns Hopkins University Press},
   Address	= {Baltimore, Md.},
   Edition	= {3rd},
   Series	= {Johns Hopkins studies in the mathematical sciences},
   Keywords	= {Matrices Data processing.},
   Year 	= {1996} }


% 339) Record # 29
@article{,
   Author	= {Bhattacharya, S.K. and Bhatevara, S. and Sutter, D.A. and Kamen, E.W. and May, G.S. and Tummala, R.R.},
   Title 	= {An automated workcell for meniscus coating on 24-in packaging substrates},
   Journal	= {Components and Packaging Technologies, IEEE Transactions on [see also Components, Packaging and Manufacturing Technology, Part A: Packaging Technologies, IEEE Transactions on]},
   Volume	= {24},
   Number	= {4},
   Pages	= {625-630},
   Abstract	= {Improved coating procedures are essential to the success of low-cost large substrate multichip module (MCM) fabrication, as existing coaters are slow and waste too much material. New coaters are needed that are able to coat large area substrates and have sufficient throughput and material savings to substantially reduce the manufacturing costs. The requirements for a large substrate coater include sufficient flexibility to coat a wide range of materials at various film thicknesses. This paper describes a meniscus coating workcell that meets these requirements. The complete coating workcell includes robotic material handling, automated sample transport, and convection drying of coated films. In-situ viscosity monitoring and in-line thickness measurements can be retrofitted into this workcell. Feasibility of a thin and uniform polymer coating with thickness on the order of a micrometer is demonstrated on a 24/spl times/24 in glass substrate using the automated coating operation. Preliminary study indicates that a throughput of /spl sim/20 substrates/h is achievable by optimizing the turnaround time of the coater heads, substrate holder, and substrate loading/unloading by the robot.},
   Keywords	= {coating techniques, multichip modules, process control, materials handling, industrial robots, drying, automated workcell, meniscus coating, packaging substrates, coating procedures, multichip module fabrication, large area substrates, throughput, material savings, manufacturing costs, robotic material handling, convection drying, automated sample transport, viscosity monitoring, thickness measurements, polymer coating, turnaround time, coater heads, substrate holder, substrate loading/unloading, 24 in},
   Year 	= {2001} }


% 340) Record # 28
@inproceedings{,
   Author	= {Torab, P. and Kamen, E.W.},
   Title 	= {On approximate renewal models for the superposition of renewal processes},
   BookTitle	= {Communications, 2001. ICC 2001. IEEE International Conference on},
   Address	= {Movaz Networks, McLean, VA, USA},
   Volume	= {9},
   Pages	= {2901-2906},
   Abstract	= {It is well known that the superposition of a finite number of renewal processes is not renewal anymore. A renewal approximation can be obtained by simply ignoring the interarrival dependencies and using the interarrival distribution. We show that this simple approximation is also rate-optimal, i.e., it defines a rate process that minimizes the mean-squared rate error functional over the set of all renewal processes. We also show that the optimal approximation is closely related to the rate of a new process, called the recurrence process, which is constructed by sampling the recurrence times from the original process. Applications to traffic analysis are discussed.},
   Keywords	= {telecommunication traffic, sampling methods, least mean squares methods, approximate renewal models, renewal processes superposition, interarrival dependencies, interarrival distribution, rate-optimal approximation, rate process, mean-squared rate error functional minimization, optimal approximation, recurrence process, sampling, recurrence times, traffic analysis},
   Year 	= {2001} }


% 341) Record # 27
@article{,
   Author	= {Krauss, A.F. and Kamen, E.W.},
   Title 	= {Run-by-run estimation-based control of meniscus coating},
   Journal	= {Electronics Packaging Manufacturing, IEEE Transactions on [see also Components, Packaging and Manufacturing Technology, Part C: Manufacturing, IEEE Transactons on]},
   Volume	= {22},
   Number	= {3},
   Pages	= {209-222},
   Abstract	= {This paper describes the application of process control techniques to the meniscus coating process. Meniscus coating may be used to deposit polymers used in integrated circuits and electronics packages. Three control schemes are presented and each employs Kalman filtering to identify process coefficients. The three schemes differ according to the process model and amount of process information that is available. The dominating process parameters are applicator speed and material viscosity which affect the output of film thickness. The first scheme addresses the case where the least amount of information is known; viscosity is not measured. Identification and control is applied to a meniscus coater that does not have hardware to sense viscosity. In the second control scheme, viscosity sensors are used. However, limitations of the process model and the nature of the process produce controller lag in the presence of a shift in the process. This lag is undesirable in a manufacturing setting, therefore the third scheme is introduced which improves upon the second by reducing lag. The third scheme employs curves fitted to a history of process data to reinitialize the coefficient estimates when there is a shift in the process.},
   Keywords	= {process control, packaging, Kalman filters, coating techniques, polymer films, run-by-run estimation-based control, meniscus coating, process control techniques, electronics packages, polymers, Kalman filtering, process coefficients, applicator speed, material viscosity, film thickness, controller lag, coefficient estimates},
   Year 	= {1999} }


% 342) Record # 26
@inproceedings{,
   Author	= {Kamen, E.W. and Torab, P. and Cooper, K. and Custodi, G.},
   Title 	= {Design and analysis of packet-switched networks for control systems},
   BookTitle	= {Decision and Control, 1999. Proceedings of the 38th IEEE Conference on},
   Address	= {Sch. of Electr. & Comput. Eng., Georgia Inst. of Technol., Atlanta, GA, USA},
   Volume	= {5},
   Pages	= {4460-4465},
   Abstract	= {This paper presents a methodology for analyzing and designing a packet-switched computer network for application to complex control systems. The focus is on generating the high-level control network that interconnects input-output controllers with devices for monitoring and analysis and with high-level controllers such as supervisory PLCs. Part of the development given in this paper can also be applied to the device-level network (Fieldbus) that interconnects input-output controllers with sensors, actuators, and other devices in the system being controlled. A procedure is given for generating a network design with a hierarchical hub topology having full redundancy. Then in terms of a graph model of the network, an algorithm is presented for computing the information flow rates in the network design, which can then be used for capacity planning and estimating the delay times through the network.},
   Keywords	= {computer networks, packet switching, control systems, telecommunication network planning, trees (mathematics), packet-switched networks, control systems, computer network, device-level network, hierarchical hub topology, graph model, information flow rates},
   Year 	= {1999} }


% 343) Record # 25
@inproceedings{Sta+Kam99,
   Author	= {Stan, O. and Kamen, E.W.},
   Title 	= {New block recursive MLP training algorithms using the Levenberg-Marquardt algorithm},
   BookTitle	= {Neural Networks, 1999. IJCNN '99. International Joint Conference on},
   Address	= {Sch. of Electr. & Comput. Eng., Georgia Inst. of Technol., Atlanta, GA, USA},
   Volume	= {3},
   Pages	= {1672-1677},
   Abstract	= {A block formulation of the Levenberg-Marquardt algorithm to train feedforward MLPs is designed to track time-varying nonlinear functions. The resulting algorithm is called the block Levenberg-Marquardt algorithm. There are two varieties of the algorithm: the overlapping and the non-overlapping block Levenberg-Marquardt. The two algorithms are developed in terms of a block presentation of the input/output training set. The tracking problem can be viewed as one of solving a sequence of nonlinear identification problems. With the persistent excitation and slowly-varying system conditions satisfied, the Levenberg-Marquardt algorithm can be shown to have a uniform rate of convergence over the entire sequence of problems. The block Levenberg-Marquardt algorithms are tested on a nonlinear time-varying function tracking problem. The algorithms show performance that is superior to the performance of existing algorithms like the global extended Kalman filter algorithm with state noise in the system equations.},
   Keywords	= {multilayer perceptrons, learning (artificial intelligence), nonlinear functions, tracking, convergence, Levenberg-Marquardt algorithm, time-varying nonlinear functions, block recursive learning, multilayer perceptrons, tracking, convergence},
   Year 	= {1999} }


% 344) Record # 24
@inproceedings{,
   Author	= {Kamen, E.W.},
   Title 	= {Generation of Boolean logic equations for discrete logic control},
   BookTitle	= {Emerging Technologies and Factory Automation, 1999. Proceedings. ETFA '99. 1999 7th IEEE International Conference on},
   Editor	= {Fuertes, J.M.},
   Address	= {Dept. of Electr. & Comput. Eng., Georgia Inst. of Technol., Atlanta, GA, USA},
   Volume	= {2},
   Pages	= {1541-1545},
   Abstract	= {A systematic procedure is presented for generating Boolean logic equations that represent the desired control action to be carried out by a discrete logic controller. A key component of the controller design is the specification of set and reset operations that define the next value of each state variable in the Boolean logic equations for the controller. The logic equations can be implemented on a PLC or PC in order to realize the desired control action. Two examples are given to illustrate the procedure.},
   Keywords	= {discrete systems, Boolean algebra, programmable controllers, Boolean logic equations, discrete logic control, systematic procedure, control action, discrete logic controller, controller design, reset operations, state variable, PLC, PC},
   Year 	= {1999} }


% 345) Record # 23
@inproceedings{,
   Author	= {Torab, P. and Kamen, E.W.},
   Title 	= {Load analysis of packet switched networks in control systems},
   BookTitle	= {Industrial Electronics Society, 1999. IECON '99 Proceedings. The 25th Annual Conference of the IEEE},
   Address	= {Sch. of Electr. & Comput. Eng., Georgia Inst. of Technol., Atlanta, GA, USA},
   Volume	= {3},
   Pages	= {1222-1227},
   Abstract	= {Analysis and design of switched networks in control systems often comes in close connection with the load analysis problem. Given the volume and pattern of traffic among the network end nodes, the problem can be defined as computing the amount of traffic or load on the network internal nodes, corresponding to network switch devices. We discuss a systematic solution to this problem using the graph model of the network coupled with a compact representation of the network traffic in the form of a traffic matrix. In particular, we present an iterative solution for a special class of switched networks, namely, networks with free topology. Beginning with the graph model and the traffic matrix of the original network, the loads on end nodes of the network are computed through simple matrix operations. The graph model is then trimmed by removing a group of end nodes and an equivalent traffic matrix is computed for the new graph. The procedure is repeated until the network is reduced to a single node, which typically happens to be the backbone switch of the network.},
   Keywords	= {distributed control, packet switching, switched networks, directed graphs, computer networks, distributed control systems, packet switched networks, control systems, load analysis, traffic volume, traffic pattern, network internal nodes, network switch devices, directed graph model, traffic matrix, iterative solution, matrix operations, end nodes, equivalent traffic matrix, backbone switch},
   Year 	= {1999} }


% 346) Record # 22
@inproceedings{Sahinci98,
   Author	= {Sahinci, E. and Kamen, E.W.},
   Title 	= {Detection of discrete faults in electronics assembly},
   BookTitle	= {Control Applications, 1998. Proceedings of the 1998 IEEE International Conference on},
   Address	= {Sch. of Electr. & Comput. Eng., Georgia Inst. of Technol., Atlanta, GA, USA},
   Volume	= {2},
   Pages	= {776-780},
   Abstract	= {We present an optimal estimation approach to detecting discrete faults in electronics assembly. The algorithm utilizes a nonlinear fault model whose state is a vector containing the probabilities of the process in the normal operating state and all possible fault states at a given time. The model describes the time behaviour of the process state and how the process state is related to the process measurements. An extended Kalman filter is used to obtain an estimate of the process state. This approach is applied to an electronics assembly line located at the Center for Board Assembly Research at Georgia Tech.},
   Keywords	= {assembling, production control, fault diagnosis, state estimation, radial basis function networks, hidden Markov models, probability, Kalman filters, electronics assembly, optimal estimation, discrete fault detection, nonlinear fault model, probability, time behaviour, process state, extended Kalman filter, state estimation, Georgia Tech, hidden Markov model, RBF neural nets},
   Year 	= {1998} }


% 347) Record # 21
@inproceedings{,
   Author	= {Krauss, A.F. and Kamen, E.W. and Chng, C.M. and The, A.C.},
   Title 	= {Recipe generation for large-area meniscus coating using Kalman filter estimation},
   BookTitle	= {Electronics Manufacturing Technology Symposium, 1997., Twenty-First IEEE/CPMT International},
   Address	= {Sch. of Electr. & Comput. Eng., Georgia Inst. of Technol., Atlanta, GA, USA},
   Pages	= {76-80},
   Abstract	= {Material deposition is one of the repeated, and important, steps in electronics manufacturing. Meniscus coating is a low-waste technique that may be used in applications where spin coating is found. The process exhibits time-varying behavior and thus utilizing feedback control methods to compensate for this behavior is desirable. This paper describes the large-area meniscus coating process, explains modeling techniques used and presents results from closed-loop experiments. Feedback in the form of Kalman filtering and EWMA filtering is contrasted, with Kalman Filter techniques improving performance considerably. These process control techniques require no additional hardware and therefore very little cost is associated with implementation of these feedback algorithms.},
   Keywords	= {coating techniques, integrated circuit manufacture, process control, feedback, Kalman filters, parameter estimation, compensation, recipe generation, large-area meniscus coating, Kalman filter estimation, material deposition, low-waste technique, spin coating, time-varying behavior, feedback control methods, compensation, modeling techniques, closed-loop experiments, process control techniques, feedback algorithms, EWMA filtering},
   Year 	= {1997} }


% 348) Record # 20
@inproceedings{,
   Author	= {Kamen, E.W. and Gazarik, M.J. and Napolitano, J.},
   Title 	= {A course in industrial controls and manufacturing for EE students and other engineering majors},
   BookTitle	= {American Control Conference, 1997. Proceedings of the 1997},
   Address	= {Sch. of Electr. & Comput. Eng., Georgia Inst. of Technol., Atlanta, GA, USA},
   Volume	= {5},
   Pages	= {3160-3165},
   Abstract	= {While traditional control theory is taught in the various undergraduate engineering programs, industry applications often involve continuous variable process control and discrete logic control in a manufacturing environment. At the Georgia Institute of Technology, a new course on industrial controls and manufacturing was developed to introduce undergraduate electrical engineering students and other engineering majors to the fundamentals of process control, discrete logic control, and manufacturing. Although elements of these topics can be found in courses offered by chemical engineering, industrial engineering, mechanical engineering, and textile engineering departments, the objective here is to provide an integrated presentation of the topics with an emphasis on controls. Central to the course is a laboratory project that provides students the opportunity to implement discrete logic and continuous variable control strategies on a real, physical system. Experiments involving PID control using a PC-based interface and discrete logic control using a PLC are a core part of the learning experience. In this paper details are given on the course content and the laboratory experiment.},
   Keywords	= {process control, educational courses, electrical engineering education, control engineering education, three-term control, programmable controllers, computer aided instruction, manufacture, industrial controls, manufacturing, continuous variable process control, discrete logic control, Georgia Institute of Technology, undergraduate electrical engineering students, laboratory project, continuous variable control strategies, PID control, PC-based interface, PLC},
   Year 	= {1997} }


% 349) Record # 19
@inproceedings{,
   Author	= {Krauss, A.F. and Kamen, E.W.},
   Title 	= {A multiple model approach to process control in electronics manufacturing},
   BookTitle	= {Electronics Manufacturing Technology Symposium, 1996., Nineteenth IEEE/CPMT},
   Address	= {Sch. of Electr. & Comput. Eng., Georgia Inst. of Technol., Atlanta, GA, USA},
   Pages	= {455-461},
   Abstract	= {In the first part of the paper, simulations are given of process control methods based on EWMA and single Kalman filter techniques which have already been applied to microelectronics manufacturing. Then a new approach to process control is proposed which is based on interactive multiple model (IMM) Kalman filtering. The application of this new approach to polymer deposition is discussed and simulations are given based on an approximation of process behavior. The results indicate that basing process control on multiple-model estimation can reduce the output variance when the process parameters are varying within the realm of a small number of known modes.},
   Keywords	= {integrated circuit manufacture, process control, moving average processes, Kalman filters, polymer films, process control, electronics manufacturing, simulation, EWMA, Kalman filter, microelectronics, interactive multiple model, polymer deposition},
   Year 	= {1996} }


% 350) Record # 18
@inproceedings{,
   Author	= {Sills, J.A. and Kamen, E.W.},
   Title 	= {Wiener filtering of nonstationary signals based on spectral density functions},
   BookTitle	= {Decision and Control, 1995., Proceedings of the 34th IEEE Conference on},
   Address	= {Sch. of Electr. & Comput. Eng., Georgia Inst. of Technol., Atlanta, GA, USA},
   Volume	= {3},
   Pages	= {2521-2526},
   Abstract	= {This paper deals with a large class of nonstationary stochastic processes generated by passing white noise through a general linear time-varying filter. It is shown that such processes can be characterized in terms of a family of jointly wide-sense stationary processes. This formulation is used to define the spectral density function for the nonstationary processes considered in the paper.  Then the spectral density function is used to give a suboptimal solution to the nonstationary Wiener filtering problem. This suboptimal solution is shown to be nearly optimal under conditions corresponding to a sufficiently small rate of variation. A numerical example compares this suboptimal Wiener filter solution to an optimal solution.},
   Keywords	= {Wiener filters, white noise, stochastic processes, time-varying filters, Wiener filtering, nonstationary signals, spectral density functions, white noise, linear time-varying filter, wide-sense stationary processes},
   Year 	= {1995} }


% 351) Record # 17
@inproceedings{,
   Author	= {Sastry, C.R. and Slocumb, B.J. and West, P.D. and Kamen, E.W. and Stalford, H.L.},
   Title 	= {Tracking a Maneuvering Target using Jump Filters},
   BookTitle	= {American Control Conference, 1994},
   Address	= {Georgia Tech Research Institute},
   Volume	= {2},
   Pages	= {2081-2087},
   Abstract	= {The concept of the jump filter, developed in previous work, is employed herein to track the maneuvering targets in the benchmark problem [1]. The jump filter, which is based on the technique of input estimation, provides a simple and straightforward approach to track maneuvering targets. The jump filter tracks the benchmark data with an average track loss of about 1% using a 2 Hz sample rate.},
   Year 	= {1994} }


% 352) Record # 16
@article{,
   Author	= {Sastry, C.R. and Kamen, E.W.},
   Title 	= {SME filter approach to multiple target tracking with radar measurements},
   Journal	= {Radar and Signal Processing, IEE Proceedings F},
   Volume	= {140},
   Number	= {4},
   Pages	= {251-260},
   Abstract	= {The symmetric measurement equation (SME) filter approach to track maintenance in multiple target tracking (MTT) is extended to the case when the position measurements are obtained from a radar. A key property of the SME filter is that there is no need to consider target/measurement associations to carry out target state estimation, which results in a substantial reduction in the computational complexity of the MTT problem. In the paper the SME filter is developed for the case of N targets moving in three-dimensional space whose motions consist of random perturbations about constant-velocity trajectories. It is assumed that noisy measurements of the spherical coordinate positions (ranges, elevation and azimuth angles) of the N targets are available. The work is focused on the case when the symmetric measurement equations are formed by taking sums of products of the Cartesian coordinate position measurements that are generated from the spherical coordinate position measurements. The performance of the SME filter is investigated by generating a computer simulation in the six-target case.},
   Keywords	= {multiple target tracking, radar measurements, symmetric measurement equation, track maintenance, position measurements, SME filter, target state estimation, computational complexity, three-dimensional space, constant-velocity trajectories, noisy measurements, spherical coordinate positions, ranges, elevation, azimuth angles, Cartesian coordinate, computer simulation, filtering and prediction theory, filters, radar applications, tracking systems},
   Year 	= {1993} }


% 353) Record # 15
@article{,
   Author	= {Kamen, E.W. and Sastry, C.R.},
   Title 	= {Multiple target tracking using products of position measurements},
   Journal	= {Aerospace and Electronic Systems, IEEE Transactions on},
   Volume	= {29},
   Number	= {2},
   Pages	= {476-493},
   Abstract	= {The continued development of the symmetric measurement equation (SME) filter for track maintenance in multiple target tracking (MTT) is considered, focusing on the case in which the SMEs are generated by forming sums of products of the original position measurements. The SME filter is developed for the case of N targets whose motions consist of random perturbations about constant-velocity trajectories. It is assumed that measurements of x-coordinate positions are available, and that the number of measurements is equal to the number of targets. Various analytical properties of the SME filter are studied. It is shown that under a very weak condition, the estimation error equation is locally exponentially stable. The performance of the SME filter is investigated by comparing it with an optimal (minimum-variance) estimator and by generating a computer simulation in the six-target case.},
   Keywords	= {extended Kalman filter, products of position measurements, symmetric measurement equation, track maintenance, multiple target tracking, random perturbations, constant-velocity trajectories, x-coordinate positions, estimation error equation, SME filter, computer simulation, digital simulation, filtering and prediction theory, Kalman filters, parameter estimation, position measurement, random processes, stability, tracking},
   Year 	= {1993} }


% 354) Record # 14
@article{,
   Author	= {Sastry, C.R. and Kamen, E.W. and Simaan, M.},
   Title 	= {An efficient algorithm for tracking the angles of arrival of moving targets},
   Journal	= {Signal Processing, IEEE Transactions on},
   Volume	= {39},
   Number	= {1},
   Pages	= {242-246},
   Abstract	= {A novel technique for tracking the angles of arrival of moving targets is presented. The targets are modeled as signal sources that continuously emit narrowband signals which impinge on an array of sensors. Estimates of target angles are obtained by minimizing the norm of an error matrix function involving the covariance of the sensor outputs. The algorithm yields estimates that are automatically correctly associated with previous estimates. Consequently, the data association problem does not arise, and this results in a much more efficient scheme in comparison to existing methods involving search over N factorial possible measurement/target associations (where N is the number of targets). Performance of the algorithm is illustrated by a simulation example.},
   Keywords	= {angles of arrival tracking, sensor array, array processing, efficient algorithm, moving targets, narrowband signals, error matrix function, covariance, parameter estimation, signal processing, tracking},
   Year 	= {1991} }


% 355) Record # 13
@article{,
   Author	= {Kamen, E.W.},
   Title 	= {Multiple target tracking based on symmetric measurement equations},
   Journal	= {Automatic Control, IEEE Transactions on},
   Volume	= {37},
   Number	= {3},
   Pages	= {371-374},
   Abstract	= {An approach to track maintenance in multiple target tracking is presented in terms of measurements which are symmetric functions of target positions. In this approach, the data association problem is embedded in the process of target state estimation so that there is no need to consider possible target/measurement associations. For N targets moving in three-dimensional space, the first-order version of the target state estimator is an extended Kalman filter of dimension 6N. Attention is focused on the case of constant-velocity targets with the number of measurements (of a given coordinate) assumed to be equal to the number of targets.},
   Keywords	= {symmetric measurement equations, track maintenance, multiple target tracking, data association, state estimation, extended Kalman filter, Kalman filters, state estimation, tracking, State estimation},
   Year 	= {1992} }


% 356) Record # 12
@inproceedings{,
   Author	= {Moon, Jeongseung and Wardi, Y.Y. and Kamen, E.W.},
   Title 	= {Optimal release times in single-stage manufacturing systems},
   BookTitle	= {Emerging Technologies and Factory Automation, 2001. Proceedings. 2001 8th IEEE International Conference on},
   Address	= {Georgia Institute of Technology},
   Pages	= {519-526},
   Year 	= {2001} }


% 357) Record # 11
@inproceedings{Barajas03,
   Author	= {Barajas, Leandro G. and Egerstedt, Magnus and Kamen, Edward W. and Goldstein, Alex},
   Title 	= {Process control in a high-noise environment with limited number of measurements},
   BookTitle	= {American Control Conference},
   Address	= {Denver, CO},
   Abstract	= {In this paper, we develop a hybrid control algorithm that generates adequate control values for processes where only a limited number of function evaluations are available for the control law generation. This situation arises, for example, in stencil printing processes in printed circuit board manufacturing, where the cost associated with multiple function evaluations is prohibitive. The proposed control scheme is based on a weak-search algorithm that can be used in the presence of large amounts of noise as well as when only a limited amount of information is known about the process. The control law is given by a modified version of a constrained conjugated-gradient method, transitioned into a windowed-smoothed block-form of the least-squares affine estimator.},
   Keywords	= {LS, hybrid control, noise, least squares, affine estimator, conjugated gradient},
   Year 	= {2003} }


% 358) Record # 10
@book{Atk89,
   Author	= {Atkinson, Kendall E.},
   Title 	= {An introduction to numerical analysis},
   Publisher	= {Wiley},
   Address	= {New York},
   Edition	= {2nd},
   Keywords	= {Numerical analysis},
   Year 	= {1989} }


% 359) Record # 9
@article{Barajas01,
   Author	= {Barajas, Leandro G. and Kamen, Edward W. and Goldstein, Alex},
   Title 	= {On-line enhancement of the stencil printing process},
   Journal	= {Circuits Assembly},
   Number	= {March},
   Pages	= {32-36},
   Month	= {March},
   Abstract	= {A assembly lines are related to the stencil printing process, and approximately 30 percent of the total manufacturing cost is due test and rework expenses. Many factors the quality of the stencil printing process, including squeegee pressure, printing speed, solder paste viscosity and rheology, and air and humidity within the production environment. Efforts have been made to enhance the of the printing process by using feedback control, where automatic optical inspection (AOI) measurements of deposited solder paste bricks are used to adjust machine settings such as squeegee pressure and printing speed. However, the success that has achieved in using on-line feedback control existing surface-mount lines appears to be rather limited. Some new stencil printers do include closed-loop controller to maintain desired squeegee pressures and printing speeds in printing directions.However, these controllers do not ensure that the deposited bricks will have desired characteristics such as the correct.},
   Keywords	= {defects related SPP, fuzzy logic, SPC, neural network},
   Year 	= {2001} }


% 360) Record # 8
@inproceedings{,
   Author	= {Jang, Ho-Cheol and Jee, Chul-Won and Kim, Young-Ho and Park, In-Bae and Seo, Sung-Min and Min, Byung-Yul},
   Title 	= {A study on the reliability of stencil printed solder bumps},
   BookTitle	= {Electronics Manufacturing Technology Symposium, 2000. Twenty-Sixth IEEE/CPMT International},
   Address	= {Dept. of Mater. Eng., Hanyang Univ., Seoul, South Korea},
   Pages	= {288-293},
   Abstract	= {The reliability of solder bumps formed using stencil printing and reflow was investigated for flip chip applications. Eutectic solder paste was printed through a metal mask and then reflowed repeatedly. The shear strength of the solder bumps and the process capability C/sub p/ were measured as a function of the number of solder reflows. Cu/sub 6/Sn/sub 5/ was the only intermetallic compound observed in the interface after reflow. The thickness of the intermetallic compound rapidly increased with the number of reflow cycles, saturating after the third reflow. The intermetallic compound became scallop shaped after the third reflow, changing to a spheroid shape after the fifth reflow and was separated from the interface. The Cu was completely consumed by Cu-Sn reaction after the fifth reflow. The shear strength of the solder bumps increased with the number of reflow cycles until the fifth reflow, after which it decreased. The initial increase in shear strength is attributed to the reduction of pores in the solder bumps. The decrease of shear strength after 5 cycles of reflow is attributed to the direct contact between the solder and nonwettable metal.},
   Keywords	= {reflow soldering, microassembling, flip-chip devices, integrated circuit packaging, integrated circuit interconnections, lead alloys, tin alloys, eutectic alloys, integrated circuit testing, porosity, shear strength, integrated circuit reliability, wetting, interface structure, reliability, stencil printed solder bumps, solder bumps, stencil printing, reflow, flip chip applications, eutectic solder paste, metal mask, solder paste printing, shear strength, process capability, solder reflow, Cu/sub 6/Sn/sub 5/ intermetallic compound, intermetallic compound thickness, reflow cycles, scallop shaped intermetallic, spheroid shaped intermetallic, interface intermetallic separation, Cu consumption, Cu-Sn reaction, solder bump pore reduction, direct solder/nonwettable metal contact, SnPb, Cu/sub 6/Sn/sub 5/, Cu},
   Year 	= {2000} }


% 361) Record # 7
@inproceedings{Rajkumar00,
   Author	= {Rajkumar, D. and Nguty, T. and Ekere, N.N.},
   Title 	= {Optimising process parameters for flip chip stencil printing using Taguchi's method},
   BookTitle	= {Electronics Manufacturing Technology Symposium, 2000. Twenty-Sixth IEEE/CPMT International},
   Address	= {Sch. of Aeronaut. Mech. & Manuf. Eng., Salford Univ., UK},
   Pages	= {382-388},
   Abstract	= {Solder paste printing is an important process in surface mount device assembly using the reflow soldering technique. There is wide agreement in the industry that the paste printing process accounts for the majority of assembly defects, and most defects originate from poor understanding of the effect of printing process parameters on printing performance and the nature of their interactions. The key solder paste printing process parameters considered in this study are the squeegee pressure, squeegee speed, stencil-substrate separation speed and squeegee print direction. Previous work shows that these process parameters affect printing process performance. As the current product miniaturisation trend continues for hand-held consumer products, area array type package solutions such as chip scale packages and flip chip are now being designed into products. Assembly of these devices requires the printing of very small solder paste deposits consistently from pad to pad, and from board to board. This paper concerns the determination of the solder paste printing process window for flip chip assembly applications. Five different solder paste formulations, specially formulated for flip-chip assembly, were evaluated as part of a broader study on low cost solder bumped flip-chip assembly. The results were also used for establishing guidelines for printing solder pastes for both solder bumping and the flip-chip assembly process. The experimental design for the study was based on the Taguchi method. A 2-level and 4-factor orthogonal array was used to investigate the main effects.},
   Keywords	= {reflow soldering, Taguchi methods, design of experiments, flip-chip devices, microassembling, integrated circuit packaging, integrated circuit interconnections, optimisation, process parameter optimization, flip chip stencil printing, Taguchi method, solder paste printing, surface mount device assembly, reflow soldering, paste printing process, assembly defects, printing process parameters, printing performance, solder paste printing process parameters, squeegee pressure, squeegee speed, stencil-substrate separation speed, squeegee print direction, process parameters, printing process performance, product miniaturisation, hand-held consumer products, area array type package, chip scale packages, flip chip, assembly, solder paste deposits, board to board consistency, pad to pad consistency, solder paste printing process window, flip chip assembly applications, solder paste formulations, solder bumped flip-chip assembly, solder pastes, solder bumping, flip-chip assembly process, experimental design, orthogonal array},
   Year 	= {2000} }


% 362) Record # 5
@inproceedings{Jiang97,
   Author	= {Jiang, Tongbi and Ahmad, S.S. and Jesse, C. and Moden, W.},
   Title 	= {Optimizing stencil printing parameters for organic materials},
   BookTitle	= {Electronics Manufacturing Technology Symposium, 1997., Twenty-First IEEE/CPMT International},
   Address	= {Micron Technol. Inc., Boise, ID, USA},
   Pages	= {68-72},
   Abstract	= {Effect of printing speed and squeegee pressure were studied for the quality of stencil printed organic material using a commercially available statistical application, JMP(R). Prints were evaluated by measuring their actual widths compared to the stencil opening in both parallel and perpendicular directions relative to squeegee travel; by print wall angle; film thickness and the extent of material bleed.JMP(R) software gave a visual picture of the effectiveness of specific machine parameters. Output of stencil printing can be predicted quantitatively for various factors. Running behavior of material (flow beyond stencil aperture boundary) was dissimilar in parallel and perpendicular directions. The optimum print quality can be achieved by varying the process parameters.},
   Keywords	= {design of experiments, statistical analysis, quality control, printing, assembling, process control, printed circuit manufacture, production engineering computing, stencil printing parameters optimisation, organic materials, printing speed, squeegee pressure, statistical application, JMP software, print wall angle, film thickness, material bleed, speed pressure //  _|_, SPC, DOE, process window, response surface},
   Year 	= {1997} }


% 363) Record # 4
@inproceedings{,
   Author	= {Ahmad, S.S. and Jiang, Tongbi and Moden, W. and Breen, C. and Reeder, J.},
   Title 	= {A method for the measurement of chip to leadframe adhesion in LOC packages},
   BookTitle	= {Electronics Manufacturing Technology Symposium, 1996., Nineteenth IEEE/CPMT},
   Address	= {Micron Technol. Inc., Boise, ID, USA},
   Pages	= {402-407},
   Abstract	= {Adequate die-to-leadframe adhesion is necessary for LOC package integrity during and after manufacturing process. Poor adhesion may result in a variety of defects such as die adhesion failure, marginal wire bond, broken wire, exposed wire at the surface of the plastic encapsulated package, and bent leads, ultimately leading to electrical failure [1,2]. In this paper, a technique to measure the adhesion of leadframes to electronic chips in LOC type packages is described. In this method, the leads on opposite sides of the die are pulled using a universal materials tester (e.g., Instron). We found that sample preparation and measurement equipment set-up were critical to the consistency and repeatability of the measurements. A comparison of measurements on packages bonded with three different materials is presented. Minimum bonding forces required for best yields were determined for these three types of chip-to-leadframe bonding materials. Using this information, we were able to rank materials with respect to their relative adhesion characteristics.},
   Keywords	= {integrated circuit packaging, adhesion, lead bonding, mechanical variables measurement, materials testing, integrated circuit reliability, integrated circuit testing, chip to leadframe adhesion measurement, LOC packages, die-to-leadframe adhesion, electronic chips, minimum bonding forces, material adhesion characteristics, materials tester, Instron, pull tests},
   Year 	= {1996} }